Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423566 | SRAM-sharing for reconfigurable neural processing units | Jong-Hoon Shin, Joseph H. Hassoun | 2025-09-23 |
| 12400108 | Mixed-precision neural network accelerator tile with lattice fusion | Hamzah Ahmed Ali Abdelaziz, Joseph H. Hassoun | 2025-08-26 |
| 12361266 | Hierarchical weight preprocessing for neural network accelerator | Jong-Hoon Shin, Hamzah Ahmed Ali Abdelaziz, Joseph H. Hassoun | 2025-07-15 |
| 12314833 | Neural processor | Ilia Ovsiannikov, Joseph H. Hassoun, Lei Wang, Sehwan Lee, Joonho SONG +3 more | 2025-05-27 |
| 12299960 | Efficiency of vision transformers with adaptive token pruning | Ling Li | 2025-05-13 |
| 12229659 | Processor with outlier accommodation | Joseph H. Hassoun | 2025-02-18 |
| 12216735 | Supporting floating point 16 (FP16) in dot product architecture | Hamzah Ahmed Ali Abdelaziz, Joseph H. Hassoun | 2025-02-04 |
| 12182577 | Neural-processing unit tile for shuffling queued nibbles for multiplication with non-zero weight nibbles | Ilia Ovsiannikov, Hamzah Ahmed Ali Abdelaziz, Joseph H. Hassoun | 2024-12-31 |
| 12158923 | Low overhead implementation of Winograd for CNN with 3x3, 1x3 and 3x1 filters on weight station dot-product based CNN accelerators | Joseph H. Hassoun | 2024-12-03 |
| 12136031 | System and method for increasing utilization of dot-product based neural network accelerator | Joseph H. Hassoun | 2024-11-05 |
| 12112141 | Accelerating 2D convolutional layer mapping on a dot product architecture | Joseph H. Hassoun | 2024-10-08 |
| 12086700 | Neural processor | Ilia Ovsiannikov, Joseph H. Hassoun, Lei Wang, Sehwan Lee, Joonho SONG +3 more | 2024-09-10 |
| 12073302 | Neural processor | Ilia Ovsiannikov, Joseph H. Hassoun, Lei Wang, Sehwan Lee, Joonho SONG +3 more | 2024-08-27 |
| 12015429 | Hardware channel-parallel data compression/decompression | Ilia Ovsiannikov, Lei Wang, Joseph H. Hassoun | 2024-06-18 |
| 12001929 | Mixed-precision neural processing unit (NPU) using spatial fusion with load balancing | Hamzah Ahmed Ali Abdelaziz, Joseph H. Hassoun | 2024-06-04 |
| 11880760 | Mixed-precision NPU tile with depth-wise convolution | Ilia Ovsiannikov, Hamzah Ahmed Ali Abdelaziz, Joseph H. Hassoun | 2024-01-23 |
| 11861328 | Processor for fine-grain sparse integer and floating-point operations | Joseph H. Hassoun | 2024-01-02 |
| 11861327 | Processor for fine-grain sparse integer and floating-point operations | Joseph H. Hassoun | 2024-01-02 |
| 11775256 | Signed multiplication using unsigned multiplier with dynamic fine-grained operand isolation | Ilia Ovsiannikov, Joseph H. Hassoun, Lei Wang | 2023-10-03 |
| 11775611 | Piecewise quantization for neural networks | Jun Fang, Joseph H. Hassoun, Hamzah Ahmed Ali Abdelaziz, Georgios GEORGIADIS, Hui-Hsiung Chen +1 more | 2023-10-03 |
| 11775801 | Neural processor | Ilia Ovsiannikov, Joseph H. Hassoun, Lei Wang, Sehwan Lee, Joonho SONG +3 more | 2023-10-03 |
| 11775802 | Neural processor | Ilia Ovsiannikov, Joseph H. Hassoun, Lei Wang, Sehwan Lee, Joonho SONG +3 more | 2023-10-03 |
| 11687764 | System and method for increasing utilization of dot-product based neural network accelerator | Joseph H. Hassoun | 2023-06-27 |
| 11681907 | System and method for performing computations for deep neural networks | Hamzah Ahmed Ali Abdelaziz, Joseph H. Hassoun | 2023-06-20 |
| 11671111 | Hardware channel-parallel data compression/decompression | Ilia Ovsiannikov, Lei Wang, Joseph H. Hassoun | 2023-06-06 |