Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12400108 | Mixed-precision neural network accelerator tile with lattice fusion | Ali Shafiee Ardestani, Joseph H. Hassoun | 2025-08-26 |
| 12361266 | Hierarchical weight preprocessing for neural network accelerator | Jong-Hoon Shin, Ali Shafiee Ardestani, Joseph H. Hassoun | 2025-07-15 |
| 12216735 | Supporting floating point 16 (FP16) in dot product architecture | Ali Shafiee Ardestani, Joseph H. Hassoun | 2025-02-04 |
| 12182577 | Neural-processing unit tile for shuffling queued nibbles for multiplication with non-zero weight nibbles | Ilia Ovsiannikov, Ali Shafiee Ardestani, Joseph H. Hassoun | 2024-12-31 |
| 12001929 | Mixed-precision neural processing unit (NPU) using spatial fusion with load balancing | Joseph H. Hassoun, Ali Shafiee Ardestani | 2024-06-04 |
| 11880760 | Mixed-precision NPU tile with depth-wise convolution | Ilia Ovsiannikov, Ali Shafiee Ardestani, Joseph H. Hassoun | 2024-01-23 |
| 11775611 | Piecewise quantization for neural networks | Jun Fang, Joseph H. Hassoun, Ali Shafiee Ardestani, Georgios GEORGIADIS, Hui-Hsiung Chen +1 more | 2023-10-03 |
| 11681907 | System and method for performing computations for deep neural networks | Joseph H. Hassoun, Ali Shafiee Ardestani | 2023-06-20 |
| 11507817 | System and method for performing computations for deep neural networks | Joseph H. Hassoun, Ali Shafiee Ardestani | 2022-11-22 |