JY

Jong Shik Yoon

Samsung: 7 patents #17,688 of 75,807Top 25%
TI Texas Instruments: 7 patents #2,108 of 12,488Top 20%
Overall (All Time): #335,133 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12356697 Integrated circuit device and method of manufacturing the same Changseop Yoon 2025-07-08
9922979 Integrated circuit device and method of manufacturing the same Jae-yup Chung, Hwa-Sung Rhee, Hee-Don Jeong, Je-Min Yoo, Kyu-man Cha +2 more 2018-03-20
9754789 Method of fabricating semiconductor device and computing system for implementing the method Yoon-Hae Kim, Hwa-Sung Rhee, Byung Sung Kim 2017-09-05
9425148 Semiconductor devices having contacts with intervening spacers and method for fabricating the same Ho Jun Kim, Hae-Wang Lee, Chul-Hong Park, Dong Kyun Sohn 2016-08-23
9412693 Semiconductor device having jumper pattern and blocking pattern Yoon-Hae Kim, Hwa-Sung Rhee 2016-08-09
9209177 Semiconductor devices including gates and dummy gates of different materials Yoon-Hae Kim, Young-Gun Ko 2015-12-08
8952452 Semiconductor devices and method of manufacturing the same Hong-Seong Kang, Yoon-Hae Kim 2015-02-10
7811893 Shallow trench isolation stress adjuster for MOS transistor Andrew Tae Kim 2010-10-12
7795085 Intentional pocket shadowing to compensate for the effects of cross-diffusion in SRAMs Amitava Chatterjee, Kayvan Sadra, Shaoping Tang 2010-09-14
7514331 Method of manufacturing gate sidewalls that avoids recessing Amitava Chatterjee, Haowen Bu 2009-04-07
7229869 Method for manufacturing a semiconductor device using a sidewall spacer etchback Shirin Siddiqui, Amitava Chatterjee, Brian E. Goodlin, Karen Hildegard Ralston Kirmse 2007-06-12
7098099 Semiconductor device having optimized shallow junction geometries and method for fabrication thereof Brian Edward Hornung, Deborah J. Riley, Amitava Chatterjee 2006-08-29
7045436 Method to engineer the inverse narrow width effect (INWE) in CMOS technology using shallow trench isolation (STI) Amitava Chatterjee, Alwin Tsao, Manuel Quevedo-Lopez, Shaoping Tang 2006-05-16
7018888 Method for manufacturing improved sidewall structures for use in semiconductor devices Brian E. Goodlin, Amitava Chatterjee, Shirin Siddiqui 2006-03-28