Issued Patents All Time
Showing 26–50 of 86 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11580056 | Control barrier network for reconfigurable data processors | Raghu Prabhakar, Manish K. Shah, Ram Sivaramakrishnan, Pramod Nataraja, David Brian Jackson | 2023-02-14 |
| 11561803 | Systems and methods for editing topology of a reconfigurable data processor | Jibin Zou | 2023-01-24 |
| 11556494 | Defect repair for a reconfigurable data processor for homogeneous subarrays | Manish K. Shah, Kin Hing Leung | 2023-01-17 |
| 11409540 | Routing circuits for defect repair for a reconfigurable data processor | Manish K. Shah, Kin Hing Leung | 2022-08-09 |
| 11392740 | Dataflow function offload to reconfigurable processors | Martin Russell Raumann, Qi ZHENG, Bandish B. Shah, Ravinder Kumar, Kin Hing Leung +1 more | 2022-07-19 |
| 11386038 | Control flow barrier and reconfigurable data processor | Raghu Prabhakar, Manish K. Shah, Ram Sivaramakrishnan, Pramod Nataraja, David Brian Jackson | 2022-07-12 |
| 11327771 | Defect repair circuits for a reconfigurable data processor | Manish K. Shah, Kin Hing Leung | 2022-05-10 |
| 11237880 | Dataflow all-reduce for reconfigurable processor systems | Martin Russell Raumann, Qi ZHENG, Bandish B. Shah, Ravinder Kumar, Kin Hing Leung +1 more | 2022-02-01 |
| 11237996 | Virtualization of a reconfigurable data processor | Sumti Jairath, Mark Luttrell, Raghu Prabhakar, Ram Sivaramakrishnan, Manish K. Shah | 2022-02-01 |
| 11188497 | Configuration unload of a reconfigurable data processor | Manish K. Shah, Ram Sivaramakrishnan, Mark Luttrell, David Brian Jackson, Raghu Prabhakar +2 more | 2021-11-30 |
| 11182221 | Inter-node buffer-based streaming for reconfigurable processor-as-a-service (RPaaS) | Ram Sivaramakrishnan, Sumti Jairath, Emre Ali Burhan, Manish K. Shah, Raghu Prabhakar +8 more | 2021-11-23 |
| 11182264 | Intra-node buffer-based streaming for reconfigurable processor-as-a-service (RPaaS) | Ram Sivaramakrishnan, Sumti Jairath, Emre Ali Burhan, Manish K. Shah, Raghu Prabhakar +8 more | 2021-11-23 |
| 11150872 | Computational units for element approximation | Mingran WANG, Xiaoyan Li, Mark Luttrell, Yongning SHENG | 2021-10-19 |
| 11055141 | Quiesce reconfigurable data processor | Raghu Prabhakar, Manish K. Shah, Pramod Nataraja, David Brian Jackson, Kin Hing Leung +2 more | 2021-07-06 |
| 10831507 | Configuration load of a reconfigurable data processor | Manish K. Shah, Ram Sivaramakrishnan, Mark Luttrell, David Brian Jackson, Raghu Prabhakar +2 more | 2020-11-10 |
| 10698853 | Virtualization of a reconfigurable data processor | Sumti Jairath, Mark Luttrell, Raghu Prabhakar, Ram Sivaramakrishnan, Manish K. Shah | 2020-06-30 |
| 10108357 | Detection of multiple accesses to a row address of a dynamic memory within a refresh period | David Jeffrey, Clement Fang, Neil Duncan, Heechoul Park, Lik T. Cheng | 2018-10-23 |
| 9355689 | Detection of multiple accesses to a row address of a dynamic memory within a refresh period | David Jeffrey, Clement Fang, Neil Duncan, Heechoul Park, Lik T. Cheng | 2016-05-31 |
| 9317286 | Apparatus and method for implementing instruction support for the camellia cipher algorithm | Christopher H. Olson, Lawrence Spracklen | 2016-04-19 |
| 9213551 | Return address prediction in multithreaded processors | Manish K. Shah, Zeid H. Samoail | 2015-12-15 |
| 9122487 | System and method for balancing instruction loads between multiple execution units using assignment history | Robert T. Golla | 2015-09-01 |
| 8904156 | Perceptron-based branch prediction mechanism for predicting conditional branch instructions on a multithreaded processor | Manish K. Shah, Robert T. Golla, Jama I. Barreh | 2014-12-02 |
| 8654970 | Apparatus and method for implementing instruction support for the data encryption standard (DES) algorithm | Christopher H. Olson, Lawrence Spracklen | 2014-02-18 |
| 8583902 | Instruction support for performing montgomery multiplication | Christopher H. Olson, Lawrence Spracklen, Nils Gura | 2013-11-12 |
| 8560814 | Thread fairness on a multi-threaded processor with multi-cycle cryptographic operations | Robert T. Golla, Christopher H. Olson | 2013-10-15 |