ML

Mark Luttrell

Oracle: 23 patents #353 of 14,854Top 3%
SS Sambanova Systems: 14 patents #13 of 121Top 15%
Overall (All Time): #88,199 of 4,157,543Top 3%
37
Patents All Time

Issued Patents All Time

Showing 25 most recent of 37 patents

Patent #TitleCo-InventorsDate
12306783 Top level network and array level network for reconfigurable data processors Gregory F. Grohoski, Sumti Jairath, Raghu Prabhakar, Ram Sivaramakrishnan, Manish K. Shah 2025-05-20
12267256 Dynamic destination id in an array level network of a reconfigurable dataflow processor Ram Sivaramakrishnan, Sumti Jairath, Raghu Prabhakar, Gregory F. Grohoski 2025-04-01
12158855 Dynamic equality of service in a switch network Manish K. Shah 2024-12-03
11983140 Efficient deconfiguration of a reconfigurable data processor Manish K. Shah, Ram Sivaramakrishnan, David Brian Jackson, Raghu Prabhakar, Sumti Jairath +2 more 2024-05-14
11782729 Runtime patching of configuration files Gregory F. Grohoski, Manish K. Shah, Raghu Prabhakar, Ravinder Kumar, Kin Hing Leung +5 more 2023-10-10
11681645 Independent control of multiple concurrent application graphs in a reconfigurable data processor Gregory F. Grohoski, Sumti Jairath, Raghu Prabhakar, Ram Sivaramakrishnan, Manish K. Shah 2023-06-20
11609769 Configuration of a reconfigurable data processor using sub-files Manish K. Shah, Ram Sivaramakrishnan, David Brian Jackson, Raghu Prabhakar, Sumti Jairath +2 more 2023-03-21
11327923 Sigmoid function in hardware and a reconfigurable data processor including same Mingran WANG, Yongning SHENG 2022-05-10
11237996 Virtualization of a reconfigurable data processor Gregory F. Grohoski, Sumti Jairath, Raghu Prabhakar, Ram Sivaramakrishnan, Manish K. Shah 2022-02-01
11188497 Configuration unload of a reconfigurable data processor Manish K. Shah, Ram Sivaramakrishnan, David Brian Jackson, Raghu Prabhakar, Sumti Jairath +2 more 2021-11-30
11150872 Computational units for element approximation Mingran WANG, Xiaoyan Li, Yongning SHENG, Gregory F. Grohoski 2021-10-19
11126577 Distributed fairness protocol for interconnect networks Robert T. Golla, Manish K. Shah 2021-09-21
10831507 Configuration load of a reconfigurable data processor Manish K. Shah, Ram Sivaramakrishnan, David Brian Jackson, Raghu Prabhakar, Sumti Jairath +2 more 2020-11-10
10768899 Matrix normal/transpose read and a reconfigurable data processor including same David Alan KOEPLINGER, Raghu Prabhakar, Ram Sivaramakrishnan, David Brian Jackson 2020-09-08
10698853 Virtualization of a reconfigurable data processor Gregory F. Grohoski, Sumti Jairath, Raghu Prabhakar, Ram Sivaramakrishnan, Manish K. Shah 2020-06-30
10474601 Distributed fairness protocol for interconnect networks Robert T. Golla, Manish K. Shah 2019-11-12
9971565 Storage, access, and management of random numbers generated by a central random number generator and dispensed to hardware threads of cores John D. Pape, Paul J. Jordan, Michael Snyder 2018-05-15
9940132 Load-monitor mwait Paul N. Loewenstein, Paul J. Jordan 2018-04-10
9892039 Non-temporal write combining using cache resources David Richard Smentek, Ramaswamy Sivaramakrishnan, Serena Leung 2018-02-13
9672298 Precise excecution of versioned store instructions Zoran Radovic, Jared C. Smolens, Robert T. Golla, Paul J. Jordan 2017-06-06
9665375 Mitigation of thread hogs on a threaded processor and prevention of allocation of resources to one or more instructions following a load miss Yuan C. Chou, Robert T. Golla 2017-05-30
9405690 Method for storing modified instruction data in a shared cache 2016-08-02
9367472 Observation of data in persistent memory William Bridge, Paul N. Loewenstein 2016-06-14
9058180 Unified high-frequency out-of-order pick queue with support for triggering early issue of speculative instructions Robert T. Golla, Matthew B. Smittle, Xiang Li 2015-06-16
8412911 System and method to invalidate obsolete address translations Gregory F. Grohoski, Paul J. Jordan, Zeid H. Samoail 2013-04-02