| 11550554 |
Merged machine-level intermediate representation optimizations |
— |
2023-01-10 |
| 11210071 |
Compiler sub expression directed acyclic graph (DAG) remat for register pressure |
David McCarthy Peixotto, Michael A. Dougherty |
2021-12-28 |
| 11200061 |
Pre-instruction scheduling rematerialization for register pressure reduction |
Michael A. Dougherty, David McCarthy Peixotto |
2021-12-14 |
| 10949209 |
Techniques for scheduling instructions in compiling source code |
Michael A. Dougherty, David McCarthy Peixotto |
2021-03-16 |
| 10853042 |
Interactive code optimizer |
Marcelo Lopez Ruiz, Ivan Nevraev, David McCarthy Peixotto |
2020-12-01 |
| 10503634 |
Semantic comparison of computer compiler traces |
Ivan Nevraev, David McCarthy Peixotto, Marcelo Lopez Ruiz |
2019-12-10 |
| 10365904 |
Interactive code optimizer |
Marcelo Lopez Ruiz, Ivan Nevraev, David McCarthy Peixotto |
2019-07-30 |
| 9262171 |
Dependency matrix for the determination of load dependencies |
Robert T. Golla, Matthew B. Smittle |
2016-02-16 |
| 9058180 |
Unified high-frequency out-of-order pick queue with support for triggering early issue of speculative instructions |
Robert T. Golla, Matthew B. Smittle, Mark Luttrell |
2015-06-16 |
| 8458446 |
Accessing a multibank register file using a thread identifier |
Christopher H. Olson, Robert T. Golla |
2013-06-04 |
| 7778105 |
Memory with write port configured for double pump write |
Robert T. Golla |
2010-08-17 |
