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Detection of multiple accesses to a row address of a dynamic memory within a refresh period |
David Jeffrey, Clement Fang, Neil Duncan, Lik T. Cheng, Gregory F. Grohoski |
2018-10-23 |
| 10008257 |
Memory bitcell with column select |
Jinho Kwack, Hoyeol Cho, Myung-Gyoo Won, Peter Labrecque, Jungyong Lee |
2018-06-26 |
| 9355689 |
Detection of multiple accesses to a row address of a dynamic memory within a refresh period |
David Jeffrey, Clement Fang, Neil Duncan, Lik T. Cheng, Gregory F. Grohoski |
2016-05-31 |
| 9336862 |
Sense amp activation according to word line common point |
Myung-Gyoo Won, Thu Nguyen |
2016-05-10 |
| 9158328 |
Memory array clock gating scheme |
Song-Won Kim, Jungyong Lee |
2015-10-13 |
| 9064553 |
Fast memory read-out |
Jungyong Lee, Singrong Li |
2015-06-23 |
| 8775745 |
Process variation tolerant bank collision detection circuit |
Jungyong Lee, Singrong Li |
2014-07-08 |
| 8482316 |
Adaptive timing control circuitry to address leakage |
Zhen Liu, Shree Kant |
2013-07-09 |
| 8243541 |
Methods and apparatuses for improving reduced power operations in embedded memory arrays |
Hoyeol Cho, Song C. Kim |
2012-08-14 |
| 7924650 |
Dynamically controlled voltage regulator for a memory |
Hoyeol Cho, Jungyong Lee |
2011-04-12 |
| 7863878 |
Voltage regulator for write/read assist circuit |
Xiaozhen Guo, Jungyong Lee |
2011-01-04 |
| 7791393 |
Precision falling edge generator |
Robert P. Masleid, Jason M. Hart |
2010-09-07 |
| 7679948 |
Write and read assist circuit for SRAM with power recycling |
Song C. Kim, Lancelot Kwong |
2010-03-16 |
| 7672182 |
Read assist circuit of SRAM with low standby current |
Wilson Fai Chin, Kuan-Yu Lin, Sanjaya Dharmasena |
2010-03-02 |
| 7205810 |
Skew tolerant phase shift driver with controlled reset pulse width |
Jungyong Lee |
2007-04-17 |
