Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9742679 | Rate limiter for a message gateway | Hans Eberle, Hagen W. Peters | 2017-08-22 |
| 9384145 | Systems and methods for implementing dynamically configurable perfect hash tables | Guy L. Steele, Jr., David R. Chase | 2016-07-05 |
| 9244857 | Systems and methods for implementing low-latency lookup circuits using multiple hash functions | Guy L. Steele, Jr., David R. Chase | 2016-01-26 |
| 9223720 | Systems and methods for rapidly generating suitable pairs of hash functions | David R. Chase, Guy L. Steele, Jr. | 2015-12-29 |
| 8670454 | Dynamic assignment of data to switch-ingress buffers | Wladyslaw Olesinski, Hans Eberle | 2014-03-11 |
| 8583902 | Instruction support for performing montgomery multiplication | Christopher H. Olson, Gregory F. Grohoski, Lawrence Spracklen | 2013-11-12 |
| 8533473 | Method and apparatus for reducing bandwidth usage in secure transactions | Vipul Gupta, Arvinderpal S. Wander | 2013-09-10 |
| 8532102 | Simple fairness protocols for daisy chain interconnects | Wladyslaw Olesinski, Hans Eberle, Robert Dickson, Aron J. Silverton, Sumti Jairath +1 more | 2013-09-10 |
| 8483216 | Simple fairness protocols for daisy chain interconnects | Wladyslaw Olesinski, Hans Eberle, Robert Dickson, Aron J. Silverton, Sumti Jairath +1 more | 2013-07-09 |
| 8213606 | Method and apparatus for implementing processor instructions for accelerating public-key cryptography | Sheueling Chang Shantz, Leonard Rarick, Lawrence Spracklen, Hans Eberle | 2012-07-03 |
| 8194855 | Method and apparatus for implementing processor instructions for accelerating public-key cryptography | Sheueling Chang Shantz, Hans Eberle, Lawrence Spracklen, Leonard Rarick | 2012-06-05 |
| 8189578 | Simple fairness protocols for daisy chain interconnects | Wladyslaw Olesinski, Hans Eberle, Robert Dickson, Aron J. Silverton, Sumti Jairath +1 more | 2012-05-29 |
| 8184629 | Reliable multicast using merged acknowledgements | Hans Eberle | 2012-05-22 |
| 8176110 | Modular multiplier | Hans Eberle, Russell A. Brown, Sheueling Chang-Shantz, Vipul Gupta | 2012-05-08 |
| 8145823 | Parallel wrapped wave-front arbiter | Wladyslaw Olesinski, Hans Eberle | 2012-03-27 |
| 8006025 | Architecture for an output buffered switch with input groups | Wladyslaw Olesinski, Hans Eberle | 2011-08-23 |
| 7965705 | Fast and fair arbitration on a data link | Georgios A. Passas, Hans Eberle, Wladyslaw Olesinski | 2011-06-21 |
| 7930335 | Generic implementations of elliptic curve cryptography using partial reduction | Hans Eberle, Edouard Goupy | 2011-04-19 |
| 7925816 | Architecture for an output buffered switch with input groups | Wladyslaw Olesinski, Hans Eberle | 2011-04-12 |
| 7912068 | Low-latency scheduling in large switches | Hans Eberle, Wladyslaw Olesinski, Andreas Mejia | 2011-03-22 |
| 7702105 | Accelerating elliptic curve point multiplication through batched inversions | Stephen C. Fung, Douglas J. Stebila, Hans Eberle | 2010-04-20 |
| 7650374 | Hybrid multi-precision multiplication | Lawrence Spracklen | 2010-01-19 |
| 7639037 | Method and system for sizing flow control buffers | Hans Eberle, Wladyslaw Olesinski, Robert J. Drost, Robert D. Hopkins | 2009-12-29 |
| 7508936 | Hardware accelerator for elliptic curve cryptography | Hans Eberle, Daniel Frederic Finchelstein, Sheueling Chang-Shantz, Vipul Gupta | 2009-03-24 |
| 7490189 | Multi-chip switch based on proximity communication | Hans Eberle, Wladyslaw Olesinski | 2009-02-10 |