Issued Patents All Time
Showing 26–50 of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10431558 | Method and apparatus for back-biased switch transistors | — | 2019-10-01 |
| 10418465 | Non-volatile memory structure in silicon-on-insulator (SOI) technology | Qingqing Liang, Francesco Carobolante, George Imthurn, Fabio Alessio Marino, Narasimhulu Kanike | 2019-09-17 |
| 10420171 | Semiconductor devices on two sides of an isolation layer | — | 2019-09-17 |
| 10326028 | Complementary metal-oxide-semiconductor (CMOS) voltage-controlled resistor | Plamen Vassilev Kolev, Peter Graeme CLARKE | 2019-06-18 |
| 10290579 | Utilization of backside silicidation to form dual side contacted capacitor | Plamen Vassilev Kolev, Michael A. Stuber, Richard Hammond, Shiqun Gu, Steve Fanelli | 2019-05-14 |
| 10083963 | Logic circuit block layouts with dual-side processing | Jean RICHAUD | 2018-09-25 |
| 10074942 | Switch device performance improvement through multisided biased shielding | — | 2018-09-11 |
| 10043752 | Substrate contact using dual sided silicidation | Perry W. Lou | 2018-08-07 |
| 10002838 | Method and apparatus for back-biased switch transistors | — | 2018-06-19 |
| 9917062 | Self-aligned transistors for dual-side processing | — | 2018-03-13 |
| 9847293 | Utilization of backside silicidation to form dual side contacted capacitor | Plamen Vassilev Kolev, Michael A. Stuber, Richard Hammond, Shiqun Gu, Steve Fanelli | 2017-12-19 |
| 9837412 | S-contact for SOI | Befruz Tasbas, Simon Edward Willard, Alain Duvallet | 2017-12-05 |
| 9837302 | Methods of forming a device having semiconductor devices on two sides of a buried dielectric layer | Stephen Alan FANELLI | 2017-12-05 |
| 9824915 | Structure for radiofrequency applications and process for manufacturing such a structure | Bich-Yen Nguyen, Christophe Maleville, Anthony Mark Miscione, Alain Duvallet | 2017-11-21 |
| 9812580 | Deep trench active device with backside body contact | Steve Fanelli | 2017-11-07 |
| 9780210 | Backside semiconductor growth | Richard Hammond | 2017-10-03 |
| 9755029 | Switch device performance improvement through multisided biased shielding | — | 2017-09-05 |
| 9704738 | Bulk layer transfer wafer with multiple etch stop layers | — | 2017-07-11 |
| 9647209 | Integrated phase change switch | Michael A. Stuber | 2017-05-09 |
| 9466536 | Semiconductor-on-insulator integrated circuit with back side gate | Stuart B. Molin, George Imthurn | 2016-10-11 |
| 9362492 | Integrated phase change switch | Michael A. Stuber | 2016-06-07 |
| 7534674 | Method of making a semiconductor device with a stressor | Venkat R. Kolagunta | 2009-05-19 |
| 7488635 | Semiconductor structure with reduced gate doping and methods for forming thereof | Brian A. Winstead, James D. Burnett | 2009-02-10 |
| 7364970 | Method of making a multi-bit non-volatile memory (NVM) cell and structure | Marius Orlowski | 2008-04-29 |
| 7344933 | Method of forming device having a raised extension region | Mark C. Foisy | 2008-03-18 |