Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10043752 | Substrate contact using dual sided silicidation | Sinan Goktepeli | 2018-08-07 |
| 9397654 | Low power externally biased power-on-reset circuit | — | 2016-07-19 |
| 9385595 | Charge pump regulator circuit | Stuart B. Molin, Clint L. Kemerling | 2016-07-05 |
| 9081399 | Charge pump regulator circuit with variable amplitude control | Stuart B. Molin, Clint L. Kemerling | 2015-07-14 |
| 9041370 | Charge pump regulator circuit with a variable drive voltage ring oscillator | Stuart B. Molin, Clint L. Kemerling | 2015-05-26 |
| 8975943 | Compact level shifter | — | 2015-03-10 |
| 8497670 | Charge pump regulator circuit for powering a variable load | Stuart B. Molin, Clint L. Kemerling | 2013-07-30 |
| 7064575 | Method and system for adaptively controlling output driver impedance | — | 2006-06-20 |
| 5789972 | Regulated reference voltage generator having feedback to provide a stable voltage | — | 1998-08-04 |
| 5602495 | Apparatus for providing an output voltage with substantially identical rising and falling characteristics | — | 1997-02-11 |
| 5486778 | Input buffer for translating TTL levels to CMOS levels | — | 1996-01-23 |
| 5406219 | Differential-to-single-ended converter | — | 1995-04-11 |
| 5338990 | Regulated delay line | — | 1994-08-16 |
| 5227714 | Voltage regulator | — | 1993-07-13 |
| 5051618 | High voltage system using enhancement and depletion field effect transistors | — | 1991-09-24 |
| 4926176 | Self-timing analog-to-digital converting system | Lanny L. Lewyn | 1990-05-15 |
| 4841252 | System for compensating for offset voltages in comparators | — | 1989-06-20 |
| 4831594 | Process and device for refreshing an array of dynamic memory cells during precharge of the column lines | Aman Khosrovi, Ki S. Chang | 1989-05-16 |
| 4656369 | Ring oscillator substrate bias generator with precharge voltage feedback control | — | 1987-04-07 |
| 4628215 | Drive circuit for substrate pump | — | 1986-12-09 |
| 4454591 | Interface system for bus line control | — | 1984-06-12 |
| 4447881 | Data processing system integrated circuit having modular memory add-on capacity | George L. Brantingham, Lawrence J. Housey, Graham S. Tubbs, Jeffrey R. Teza | 1984-05-08 |
| 4325169 | Method of making CMOS device allowing three-level interconnects | James E. Ponder, Graham S. Tubbs, Stephen A. Farnow | 1982-04-20 |
| 4280271 | Three level interconnect process for manufacture of integrated circuit devices | James E. Ponder, Graham S. Tubbs | 1981-07-28 |