Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11532571 | Vertically-aligned and conductive dummies in integrated circuit layers for capacitance reduction and bias independence and methods of manufacture | Anil Kumar Vemulapalli, Matthew Deig | 2022-12-20 |
| 11133272 | Vertically-aligned and conductive dummies in integrated circuit layers for capacitance reduction and bias independence and methods of manufacture | Anil Kumar Vemulapalli, Matthew Deig | 2021-09-28 |
| 10770391 | Transistor with gate extension to limit second gate effect | Michael A. Stuber, Lee-Wen Chen | 2020-09-08 |
| 10608124 | Back silicided variable capacitor devices | Sinan Goktepeli, Fabio Alessio Marino, Narasimhulu Kanike, Qingqing Liang, Paolo Menegoli +2 more | 2020-03-31 |
| 10600894 | Bipolar junction transistor and method of fabricating the same | Sinan Goktepeli, Peter Graeme CLARKE | 2020-03-24 |
| 10326028 | Complementary metal-oxide-semiconductor (CMOS) voltage-controlled resistor | Sinan Goktepeli, Peter Graeme CLARKE | 2019-06-18 |
| 10290579 | Utilization of backside silicidation to form dual side contacted capacitor | Sinan Goktepeli, Michael A. Stuber, Richard Hammond, Shiqun Gu, Steve Fanelli | 2019-05-14 |
| 9847293 | Utilization of backside silicidation to form dual side contacted capacitor | Sinan Goktepeli, Michael A. Stuber, Richard Hammond, Shiqun Gu, Steve Fanelli | 2017-12-19 |
| 6057701 | Constant resistance deep level transient spectroscopy (CR-DLTS) system and method, averging methods for DLTS, and apparatus for carrying out the methods | — | 2000-05-02 |