SM

Sascha Moeller

NB Nxp B.V.: 9 patents #237 of 3,591Top 7%
CK Carl Freudenberg Kg: 2 patents #140 of 679Top 25%
NB Nexperia B.V.: 1 patents #59 of 166Top 40%
Overall (All Time): #409,111 of 4,157,543Top 10%
12
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11255438 Seal arrangement Olaf Nahrwold, Stefan Sindlinger, Boris Traber 2022-02-22
11168792 Seal arrangement Olaf Nahrwold, Stefan Sindlinger, Boris Traber 2021-11-09
11011446 Semiconductor device and method of making a semiconductor device Tonny Kamphuis, Leo van Gemert, Hans van Rijckevorsel, Hartmut Buenning, Steffen Holland +1 more 2021-05-18
10347534 Variable stealth laser dicing process Martin Lapke, Hartmut Buenning, Guido Albermann, Michael Zernack, Leo M. Higgins, III 2019-07-09
9847258 Plasma dicing with blade saw patterned underside mask Thomas Rohleder, Hartmut Buenning, Guido Albermann, Martin Lapke 2017-12-19
9812361 Combination grinding after laser (GAL) and laser on-off function to increase die strength Hartmut Buenning, Guido Albermann, Martin Lapke, Thomas Rohleder 2017-11-07
9601437 Plasma etching and stealth dicing laser process Guido Albermann, Thomas Rohleder, Martin Lapke, Hartmut Buenning 2017-03-21
9349645 Apparatus, device and method for wafer dicing Martin Lapke, Hartmut Buenning, Guido Albermann, Thomas Rohleder, Heiko Backer 2016-05-24
9245804 Using a double-cut for mechanical protection of a wafer-level chip scale package (WLCSP) Christian Zenz, Hartmut Buenning, Leonardus Antonius Elisabeth van Gemert, Tonny Kamphuis 2016-01-26
9196537 Protection of a wafer-level chip scale package (WLCSP) Leonardus Antonius Elisabeth van Gemert, Hartmut Buenning, Tonny Kamphuis, Christian Zenz 2015-11-24
8895363 Die preparation for wafer-level chip scale package (WLCSP) Hartmut Buenning, Guido Albermann, Thomas Rohleder, Michael Zernack 2014-11-25
8809166 High die strength semiconductor wafer processing method and system Hartmut Buenning, Martin Lapke, Guido Albermann, Thomas Rohleder 2014-08-19