Issued Patents All Time
Showing 26–50 of 86 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8533435 | Reordering operands assigned to each one of read request ports concurrently accessing multibank register file to avoid bank conflict | Xiaogang Qiu, Ming Y. Siu, Yan Yan Tang, John Erik Lindholm, Michael C. Shebanow | 2013-09-10 |
| 8405665 | Programmable graphics processor for multithreaded execution of programs | John Erik Lindholm, Brett W. Coon, Ming Y. Siu, Matthew P. Gerlach | 2013-03-26 |
| 8225076 | Scoreboard having size indicators for tracking sequential destination register usage in a multi-threaded processor | Brett W. Coon, Peter C. Mills, Ming Y. Siu | 2012-07-17 |
| 8190669 | Multipurpose arithmetic functional unit | Ming Y. Siu | 2012-05-29 |
| 8174531 | Programmable graphics processor for multithreaded execution of programs | John Erik Lindholm, Brett W. Coon, Ming Y. Siu, Matthew P. Gerlach | 2012-05-08 |
| 8176265 | Shared single-access memory with management of multiple parallel requests | Brett W. Coon, Ming Y. Siu, Weizhong Xu, John R. Nickolls, Peter C. Mills | 2012-05-08 |
| 8106914 | Fused multiply-add functional unit | Ming Y. Siu, David C. Tannenbaum | 2012-01-31 |
| 8108625 | Shared memory with parallel access and access conflict resolution mechanism | Brett W. Coon, Ming Y. Siu, Weizhong Xu, John R. Nickolls, Peter C. Mills | 2012-01-31 |
| 8051123 | Multipurpose functional unit with double-precision and filtering operations | Ming Y. Siu | 2011-11-01 |
| 8037119 | Multipurpose functional unit with single-precision and double-precision operations | Ming Y. Siu | 2011-10-11 |
| 7834881 | Operand collector architecture | Samuel Liu, John Erik Lindholm, Ming Y. Siu, Brett W. Coon | 2010-11-16 |
| 7809852 | High jitter scheduling of interleaved frames in an arbitrated loop | Rodney N. Mullendore, Anil Mehta, Keith R. Schakel, Kamran Malik | 2010-10-05 |
| 7680988 | Single interconnect providing read and write access to a memory shared by concurrent threads | John R. Nickolls, Brett W. Coon, Ming Y. Siu, Samuel Liu | 2010-03-16 |
| 7659893 | Method and apparatus to ensure consistency of depth values computed in different sections of a graphics processor | Steven E. Molnar, Alexander L. Minkin, Peter B. Holmqvist | 2010-02-09 |
| 7640285 | Multipurpose arithmetic functional unit | Ming Y. Siu | 2009-12-29 |
| 7634637 | Execution of parallel groups of threads with per-instruction serialization | John Erik Lindholm | 2009-12-15 |
| 7484076 | Executing an SIMD instruction requiring P operations on an execution unit that performs Q operations at a time (Q<P) | Ming Y. Siu, Sameer Halepete | 2009-01-27 |
| 7434032 | Tracking register usage during multithreaded processing using a scoreboard having separate memory regions and storing sequential register size indicators | Brett W. Coon, Peter C. Mills, Ming Y. Siu | 2008-10-07 |
| 7428566 | Multipurpose functional unit with multiply-add and format conversion pipeline | Ming Y. Siu | 2008-09-23 |
| 7406041 | System and method for late-dropping packets in a network switch | Rodney N. Mullendore, Anil Mehta, Keith R. Schakel, Kamran Malik | 2008-07-29 |
| 7369136 | Computing anisotropic texture mapping parameters | Paul S. Heckbert | 2008-05-06 |
| 7366745 | High-speed function approximation | Ming Y. Siu | 2008-04-29 |
| 7283556 | Method and system for managing time division multiplexing (TDM) timeslots in a network switch | Rodney N. Mullendore, Anil Mehta, Keith R. Schakel, Kamran Malik | 2007-10-16 |
| 7240184 | Multipurpose functional unit with multiplication pipeline, addition pipeline, addition pipeline and logical test pipeline capable of performing integer multiply-add operations | Ming Y. Siu | 2007-07-03 |
| 7227841 | Packet input thresholding for resource distribution in a network switch | Rodney N. Mullendore, Anil Mehta, Keith R. Schakel, Kamran Malik | 2007-06-05 |