KS

Keith R. Schakel

Google: 35 patents #390 of 22,993Top 2%
ME Metaram: 7 patents #2 of 5Top 40%
AM AMD: 6 patents #1,863 of 9,279Top 25%
NS Nishan Systems: 3 patents #5 of 8Top 65%
BS Brocade Communications Systems: 2 patents #187 of 504Top 40%
Overall (All Time): #49,414 of 4,157,543Top 2%
53
Patents All Time

Issued Patents All Time

Showing 25 most recent of 53 patents

Patent #TitleCo-InventorsDate
10013371 Configurable memory circuit system and method Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2018-07-03
9727458 Translating an address associated with a command communicated between a system and memory circuits David T. Wang, Suresh Rajan, Michael J. Smith, Frederick Daniel Weber 2017-08-08
9632929 Translating an address associated with a command communicated between a system and memory circuits Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2017-04-25
9542353 System and method for reducing command scheduling constraints of memory circuits Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2017-01-10
9542352 System and method for reducing command scheduling constraints of memory circuits Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2017-01-10
9507739 Configurable memory circuit system and method Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2016-11-29
9171585 Configurable memory circuit system and method Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2015-10-27
9047976 Combined signal delay and power saving for use with a plurality of memory circuits Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2015-06-02
8949519 Simulating a memory circuit Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2015-02-03
8868829 Memory circuit system and method Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2014-10-21
8797779 Memory module with memory stack and interface with enhanced capabilites Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2014-08-05
8773937 Memory refresh apparatus and method Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2014-07-08
8745321 Simulating a memory standard Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2014-06-03
8671244 Simulating a memory standard Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2014-03-11
8667312 Performing power management operations Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2014-03-04
8601204 Simulating a refresh operation latency Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2013-12-03
8595419 Memory apparatus operable to perform a power-saving operation Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2013-11-26
8566516 Refresh management of memory modules Suresh Rajan, Michael J. Smith, David T. Wang 2013-10-22
8566556 Memory module with memory stack and interface with enhanced capabilities Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2013-10-22
8359187 Simulating a different number of memory circuit devices Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2013-01-22
8340953 Memory circuit simulation with power saving capabilities Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2012-12-25
8280714 Memory circuit simulation system and method with refresh capabilities Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2012-10-02
8244971 Memory circuit system and method Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2012-08-14
8209479 Memory circuit system and method Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2012-06-26
8181048 Performing power management operations Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber 2012-05-15