Issued Patents All Time
Showing 26–50 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8154935 | Delaying a signal communicated from a system to at least one of a plurality of memory circuits | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-04-10 |
| 8112266 | Apparatus for simulating an aspect of a memory circuit | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-02-07 |
| 8089795 | Memory module with memory stack and interface with enhanced capabilities | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-01-03 |
| 8090897 | System and method for simulating an aspect of a memory circuit | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2012-01-03 |
| 8077535 | Memory refresh apparatus and method | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2011-12-13 |
| 8041881 | Memory device with emulated characteristics | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2011-10-18 |
| 8019589 | Memory apparatus operable to perform a power-saving operation | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2011-09-13 |
| 7809852 | High jitter scheduling of interleaved frames in an arbitrated loop | Rodney N. Mullendore, Stuart F. Oberman, Anil Mehta, Kamran Malik | 2010-10-05 |
| 7761724 | Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2010-07-20 |
| 7730338 | Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2010-06-01 |
| 7724589 | System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2010-05-25 |
| 7609567 | System and method for simulating an aspect of a memory circuit | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2009-10-27 |
| 7590796 | System and method for power management in memory systems | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2009-09-15 |
| 7580312 | Power saving system and method for use with a plurality of memory circuits | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2009-08-25 |
| 7581127 | Interface circuit system and method for performing power saving operations during a command-related latency | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2009-08-25 |
| 7472220 | Interface circuit system and method for performing power management operations utilizing power management signals | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2008-12-30 |
| 7406041 | System and method for late-dropping packets in a network switch | Rodney N. Mullendore, Stuart F. Oberman, Anil Mehta, Kamran Malik | 2008-07-29 |
| 7392338 | Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2008-06-24 |
| 7386656 | Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit | Suresh Rajan, Michael J. Smith, David T. Wang, Frederick Daniel Weber | 2008-06-10 |
| 7283556 | Method and system for managing time division multiplexing (TDM) timeslots in a network switch | Rodney N. Mullendore, Stuart F. Oberman, Anil Mehta, Kamran Malik | 2007-10-16 |
| 7227841 | Packet input thresholding for resource distribution in a network switch | Rodney N. Mullendore, Stuart F. Oberman, Anil Mehta, Kamran Malik | 2007-06-05 |
| 7215680 | Method and apparatus for scheduling packet flow on a fibre channel arbitrated loop | Rodney N. Mullendore, Stuart F. Oberman, Anil Mehta, Kamran Malik | 2007-05-08 |
| 6687789 | Cache which provides partial tags from non-predicted ways to direct search if way prediction misses | James B. Keller, Puneet Sharma | 2004-02-03 |
| 6647490 | Training line predictor for branch targets | James B. Keller, Puneet Sharma, Francis Matus | 2003-11-11 |
| 6636959 | Predictor miss decoder updating line predictor storing instruction fetch address and alignment information upon instruction decode termination condition | James B. Keller, Puneet Sharma, Francis Matus | 2003-10-21 |