Issued Patents All Time
Showing 26–50 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9558819 | Method, system and device for non-volatile memory device operation | Lucian Shifren | 2017-01-31 |
| 9548118 | Method, system and device for complementary non-volatile memory device operation | Azeez Bhavnagarwala | 2017-01-17 |
| 9529671 | Error detection in stored data values | Vikas Chandra | 2016-12-27 |
| 9483664 | Address dependent data encryption | Vikas Chandra | 2016-11-01 |
| 9449717 | Memory built-in self-test for a data processing apparatus | Alan Jeremy Becker, Chiloda Ashan Senerath Pathirane | 2016-09-20 |
| 8717078 | Sequential latching device with elements to increase hold times on the diagnostic data path | Sachin Satish Idgunji, Imran Iqbal | 2014-05-06 |
| 8555124 | Apparatus and method for detecting an approaching error condition | Sachin Satish Idgunji, Shidhartha Das, David Michael Bull | 2013-10-08 |
| 8488369 | Method of altering distribution of a chosen characteristic of a plurality of memory cells forming a memory device | Vikas Chandra | 2013-07-16 |
| 8390328 | Supplying a clock signal and a gated clock signal to synchronous elements | James Edward Myers, David Flynn, Marlin Wayne Frederick, Jr. | 2013-03-05 |
| 8347728 | Stress detection within an integrated circuit having through silicon vias | — | 2013-01-08 |
| 8339876 | Memory with improved read stability | Vikas Chandra, Satyanand Vijay Nalam, Cezary Pietrzyk | 2012-12-25 |
| 8321726 | Repairing memory arrays | Murugeswaran Surulivel | 2012-11-27 |
| 8164964 | Boosting voltage levels applied to an access control line when accessing storage cells in a memory | Vikas Chandra, Cezary Pietrzyk | 2012-04-24 |
| 8145958 | Integrated circuit and method for testing memory on the integrated circuit | Gary Robert Waggoner | 2012-03-27 |
| 8116165 | Memory with improved data reliability | Vikas Chandra, Cezary Pietrzyk | 2012-02-14 |
| 8103990 | Characterising circuit cell performance variability in response to perturbations in manufacturing process parameters | Sachin Satish Idgunji | 2012-01-24 |
| 8103918 | Clock control during self-test of multi port memory | — | 2012-01-24 |
| 7863733 | Integrated circuit with multiple layers of circuits | Krisztian Flautner, Stephen John Hill | 2011-01-04 |
| 7737720 | Virtual power rail modulation within an integrated circuit | Sachin Satish Idgunji, David Flynn | 2010-06-15 |
| 7734974 | Serial scan chain control within an integrated circuit | Dipesh Ishwerbhai Patel, Gary Robert Waggoner | 2010-06-08 |
| 7605644 | Integrated circuit power-on control and programmable comparator | Sachin Satish Idgunji, David Flynn, David William Howard | 2009-10-20 |
| 6999354 | Dynamically adaptable memory | Dhrumil Gandhi | 2006-02-14 |
| 6980943 | Flow for vector capture | Stuart L. Whannel, Jian-Jin Tuan | 2005-12-27 |
| 6380780 | Integrated circuit with scan flip-flop | Haluk Konuk, Jeff Rearick, John Stephen Walther | 2002-04-30 |
| 6191603 | Modular embedded test system for use in integrated circuits | Fidel Muradali | 2001-02-20 |