Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11429393 | Apparatus and method for supporting out-of-order program execution of instructions | Vladimir Vasekin, Ian Michael Caulfield | 2022-08-30 |
| 11416252 | Program instruction fusion | Vladimir Vasekin, Jungsoo KIM, Alexei Fedorov | 2022-08-16 |
| 11216277 | Apparatus and method of capturing a register state | — | 2022-01-04 |
| 11068238 | Multiplier circuit | Michael Alexander Kennedy, Neil Burgess, Zichao XIE | 2021-07-20 |
| 11036510 | Processing merging predicated instruction with timing permitting previous value of destination register to be unavailable when the merging predicated instruction is at a given pipeline stage at which a processing result is determined | Karel Hubertus Gerardus WALTERS | 2021-06-15 |
| 10963253 | Varying micro-operation composition based on estimated value of predicate value for predicated vector instruction | Karel Hubertus Gerardus WALTERS, Michael Alexander Kennedy | 2021-03-30 |
| 10719329 | Apparatus and method for using predicted result values | Vladimir Vasekin, David Michael Bull, Alexei Fedorov | 2020-07-21 |
| 10579389 | Fusion of instructions by delaying handling of a partial subset of a fusible group of instructions | Ian Michael Caulfield | 2020-03-03 |
| 10552160 | Handling stalling event for multiple thread pipeline, and triggering action based on information access delay | Ian Michael Caulfield, Max John Batley | 2020-02-04 |
| 10296349 | Allocating a register to an instruction using register index information | Vladimir Vasekin, Antony John Penton, Andrew James Antony Lees | 2019-05-21 |
| 9710359 | Executing debug program instructions on a target apparatus processing pipeline | Allan John Skillman | 2017-07-18 |
| 9665494 | Parallel lookup in first and second value stores | Allan John Skillman | 2017-05-30 |
| 9658919 | Malfunction escalation | Allan John Skillman | 2017-05-23 |
| 9645824 | Branch target address cache using hashed fetch addresses | Vladimir Vasekin, Allan John Skillman, Jean-Baptiste Brelot | 2017-05-09 |
| 9449717 | Memory built-in self-test for a data processing apparatus | Alan Jeremy Becker, Robert Campbell Aitken | 2016-09-20 |
| 8966228 | Instruction fetching following changes in program flow | Simon John Craske | 2015-02-24 |
| 8108730 | Debugging a multiprocessor system that switches between a locked mode and a split mode | Antony John Penton | 2012-01-31 |
| 8055888 | Initialisation of a pipelined processor | David Michael Gilday | 2011-11-08 |
| 8051323 | Auxiliary circuit structure in a split-lock dual processor system | Antony John Penton | 2011-11-01 |
| 8015337 | Power efficient interrupt detection | Mittu Xavier Kocherry, Simon John Craske, David Michael Gilday | 2011-09-06 |