Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10504573 | Array of programmable memory elements with an array of second circuit elements | James Edward Myers, John Philip Biggs | 2019-12-10 |
| 9720434 | Power gating in an electronic device | James Edward Myers, David Flynn | 2017-08-01 |
| 9539585 | Magnetic separator with dynamic baffle system | Michael Dwayne Reaves | 2017-01-10 |
| 9370781 | Magnetic separator with dynamic baffle system | Michael Dwayne Reaves | 2016-06-21 |
| 9242251 | Magnetic separator with dynamic baffle system | Michael Dwayne Reaves | 2016-01-26 |
| 8665009 | Integrated circuit and method for controlling load on the output from on-chip voltage generation circuitry | James Edward Myers, Parameshwarappa Anand Kumar Savanth, David Flynn, Bal S. Sandhu | 2014-03-04 |
| 8648654 | Integrated circuit and method for generating a layout of such an integrated circuit | James Edward Myers, John Philip Biggs, David Flynn | 2014-02-11 |
| 8502561 | Signal value storage circuitry with transition detector | David Michael Bull, Shidhartha Das | 2013-08-06 |
| 8451026 | Integrated circuit, method of generating a layout of an integrated circuit using standard cells, and a standard cell library providing such standard cells | John Philip Biggs, James Edward Myers, David Flynn, Carsten Tradowsky | 2013-05-28 |
| 7863778 | Power controlling integrated circuit cell | David Flynn, Dhrumil Gandhi, John Philip Biggs | 2011-01-04 |
| 7605644 | Integrated circuit power-on control and programmable comparator | Sachin Satish Idgunji, David Flynn, Robert Campbell Aitken | 2009-10-20 |
| 7447099 | Leakage mitigation logic | Simon Michael Ford | 2008-11-04 |
| 7154317 | Latch circuit including a data retention latch | David Flynn | 2006-12-26 |
| 6904941 | Helically formed cylinder of varying length and diameter | — | 2005-06-14 |
| 6140843 | Conditional invert functions in precharged circuits | — | 2000-10-31 |
| 5754816 | Data storage apparatus and method with two stage reading | — | 1998-05-19 |
| 5459691 | Memory circuit | — | 1995-10-17 |
| 5434823 | Output signal driver | — | 1995-07-18 |