RR

Reda R. Razouk

NS National Semiconductor: 19 patents #68 of 2,238Top 4%
Eastman Kodak: 1 patents #4,972 of 8,114Top 65%
FI Fairchild Camera & Instrument: 1 patents #58 of 173Top 35%
Overall (All Time): #210,206 of 4,157,543Top 6%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8822266 Integrated circuit micro-module Peter Smeys, Peter Johnson, Peter Deane 2014-09-02
8686332 Optically-controlled shunt circuit for maximizing photovoltaic panel efficiency Peter J. Hopper 2014-04-01
7902661 Integrated circuit micro-module Peter Smeys, Peter Johnson, Peter Deane 2011-03-08
7709956 Copper-topped interconnect structure that has thin and thick copper traces and method of forming the copper-topped interconnect structure Abdalla Aly Naem 2010-05-04
7067895 Color imager cell with transistors formed under the photodiodes — 2006-06-27
6730969 Radiation hardened MOS transistor Gobi R. Padmanabhan, Visvamohan Yegnashankaran 2004-05-04
6723593 Deep submicron MOS transistor with increased threshold voltage Gobi R. Padmanabhan, Visvamohan Yegnashankaran 2004-04-20
6696342 Small emitter and base-collector bi-polar transistor Mohamed N. Darwish, Alexei Sadovinkov 2004-02-24
6603188 Polysilicon-edge, low-power, high-frequency bipolar transistor and method of forming the transistor Mohamed N. Darwish, Alexei Sadovnikov 2003-08-05
6548323 Method of preparing light-sensitive integrated circuits for packaging Jeffrey Robert Perry, Michael E. Thomas, Robert A. Sabsowitz, Aaron Grant Simmons 2003-04-15
6475848 Polysilicon-edge, low-power, high-frequency bipolar transistor and method of forming the transistor Mohamed N. Darwish, Alexei Sadovnikov 2002-11-05
6380017 Polysilicon-edge, base-emitter super self-aligned, low-power, high-frequency bipolar transistor and method of forming the transistor Mohamed N. Darwish, Alexei Sadovnikov 2002-04-30
6365447 High-voltage complementary bipolar and BiCMOS technology using double expitaxial growth Francois Hebert, Datong Chen 2002-04-02
5911109 Method of forming an integrated circuit including filling and planarizing a trench having an oxygen barrier layer Kulwant S. Egan, Wipawan Yindeepol, Waclaw C. Koscielniak 1999-06-08
5581110 Integrated circuit with trenches and an oxygen barrier layer Kulwant S. Egan, Wipawan Yindeepol, Waclaw C. Koscielniak 1996-12-03
5179031 Method of manufacturing a polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide Michael P. Brassington, Monir H. El-Diwany, Prateep Tuntasood 1993-01-12
5124817 Polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide Michael P. Brassington, Monir H. El-Diwany, Prateep Tuntasood 1992-06-23
5082796 Use of polysilicon layer for local interconnect in a CMOS or BiCMOS technology incorporating sidewall spacers Monir H. El-Diwany, Michael P. Brassington 1992-01-21
5081518 Use of a polysilicon layer for local interconnect in a CMOS or BICMOS technology incorporating sidewall spacers Monir H. El-Diwany, Michael P. Brassington 1992-01-14
5001081 Method of manufacturing a polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide Prateep Tuntasood, Michael P. Brassington, Monir H. El-Diwany 1991-03-19
4455325 Method of inducing flow or densification of phosphosilicate glass for integrated circuits — 1984-06-19