Issued Patents All Time
Showing 1–25 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8324097 | Method of forming a copper topped interconnect structure that has thin and thick copper traces | — | 2012-12-04 |
| 8318563 | Growth of group III nitride-based structures and integration with conventional CMOS processing tools | Sandeep R. Bahl | 2012-11-27 |
| 8273608 | Method of forming a copper-compatible fuse target | — | 2012-09-25 |
| 8030733 | Copper-compatible fuse target | — | 2011-10-04 |
| 7964934 | Fuse target and method of forming the fuse target in a copper process flow | Chin-Miin Shyu | 2011-06-21 |
| 7847385 | Stacked die structure with an underlying copper-topped die | — | 2010-12-07 |
| 7709956 | Copper-topped interconnect structure that has thin and thick copper traces and method of forming the copper-topped interconnect structure | Reda R. Razouk | 2010-05-04 |
| 7118973 | Method of forming a transistor with a channel region in a layer of composite material | — | 2006-10-10 |
| 7115973 | Dual-sided semiconductor device with a resistive element that requires little silicon surface area | — | 2006-10-03 |
| 7098095 | Method of forming a MOS transistor with a layer of silicon germanium carbon | Visvamohan Yegnashankaran | 2006-08-29 |
| 7087979 | Bipolar transistor with an ultra small self-aligned polysilicon emitter | — | 2006-08-08 |
| 6853017 | Bipolar transistor structure with ultra small polysilicon emitter | — | 2005-02-08 |
| 6818938 | MOS transistor and method of forming the transistor with a channel region in a layer of composite material | — | 2004-11-16 |
| 6784099 | Dual-sided semiconductor device and method of forming the device with a resistive element that requires little silicon surface area | — | 2004-08-31 |
| 6784065 | Bipolar transistor with ultra small self-aligned polysilicon emitter and method of forming the transistor | — | 2004-08-31 |
| 6753234 | Method of forming the silicon germanium base of a bipolar transistor | — | 2004-06-22 |
| 6709936 | Narrow high performance MOSFET device design | — | 2004-03-23 |
| 6649482 | Bipolar transistor with a silicon germanium base and an ultra small self-aligned polysilicon emitter and method of forming the transistor | — | 2003-11-18 |
| 6608349 | Narrow/short high performance MOSFET device design | — | 2003-08-19 |
| 6597043 | Narrow high performance MOSFET device design | — | 2003-07-22 |
| 6589364 | Formation of doped silicon-germanium alloy utilizing laser crystallization | Stepan Essaian | 2003-07-08 |
| 6586298 | Method of forming high performance bipolar transistor | — | 2003-07-01 |
| 6528861 | High performance bipolar transistor architecture | — | 2003-03-04 |
| 6479382 | Dual-sided semiconductor chip and method for forming the chip with a conductive path through the chip that connects elements on each side of the chip | — | 2002-11-12 |
| 6468871 | Method of forming bipolar transistor salicided emitter using selective laser annealing | — | 2002-10-22 |