Issued Patents All Time
Showing 1–25 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11356087 | Method and circuitry for controlling a depletion-mode transistor | Michael D. Seeman, David Anderson | 2022-06-07 |
| 11227805 | System and method for surge-testing a gallium nitride transistor device | Paul Brohlin | 2022-01-18 |
| 11088534 | Overvoltage protection and short-circuit withstanding for gallium nitride devices | — | 2021-08-10 |
| 10340252 | High voltage device with multi-electrode control | Michael D. Seeman | 2019-07-02 |
| 10270239 | Overvoltage protection and short-circuit withstanding for gallium nitride devices | — | 2019-04-23 |
| 10094863 | High-resolution power electronics measurements | Grant L. Smith, Daniel Ruiz Flores | 2018-10-09 |
| 9991225 | High voltage device with multi-electrode control | Michael D. Seeman | 2018-06-05 |
| 9762230 | Method and circuitry for controlling a depletion-mode transistor | Michael D. Seeman, David Anderson | 2017-09-12 |
| 9082817 | Growth of multi-layer group III-nitride buffers on large-area silicon substrates and other substrates | Jamal Ramdani | 2015-07-14 |
| 9064928 | Growth of multi-layer group III-nitride buffers on large-area silicon substrates and other substrates | Jamal Ramdani | 2015-06-23 |
| 8946780 | Ohmic contact schemes for group III-V devices having a two-dimensional electron gas layer | Richard W. Foote | 2015-02-03 |
| 8735980 | Configuration and fabrication of semiconductor structure using empty and filled wells | Constantin Bulucea, William French, Jeng-Jiun Yang, Donald M. Archer, David C. Parker +1 more | 2014-05-27 |
| 8723226 | Manufacturable enhancement-mode group III-N HEMT with a reverse polarization cap | — | 2014-05-13 |
| 8629027 | Structure and fabrication of asymmetric field-effect transistor having asymmetric channel zone and differently configured source/drain extensions | Constantin Bulucea, William French, Jeng-Jiun Yang, D. Courtney Parker, Peter Johnson +1 more | 2014-01-14 |
| 8592292 | Growth of multi-layer group III-nitride buffers on large-area silicon substrates and other substrates | Jamal Ramdani | 2013-11-26 |
| 8513703 | Group III-nitride HEMT with multi-layered substrate having a second layer of one conductivity type touching a top surface of a first layers of different conductivity type and a method for forming the same | Constantin Bulucea | 2013-08-20 |
| 8502273 | Group III-nitride HEMT having a well region formed on the surface of substrate and contacted the buffer layer to increase breakdown voltage and the method for forming the same | Constantin Bulucea | 2013-08-06 |
| 8415752 | Configuration and fabrication of semiconductor structure having asymmetric field-effect transistor with tailored pocket portion along source/drain zone | Jeng-Jiun Yang, Constantin Bulucea | 2013-04-09 |
| 8410549 | Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket | Constantin Bulucea, Jeng-Jiun Yang, William French, D. Courtney Parker | 2013-04-02 |
| 8377768 | Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses | Constantin Bulucea, William French, Donald M. Archer, Jeng-Jiun Yang, D. Courtney Parker | 2013-02-19 |
| 8318563 | Growth of group III nitride-based structures and integration with conventional CMOS processing tools | Abdalla Aly Naem | 2012-11-27 |
| 8304835 | Configuration and fabrication of semiconductor structure using empty and filled wells | Constantin Bulucea, William French, Jeng-Jiun Yang, Donald M. Archer, D. Courtney Parker +1 more | 2012-11-06 |
| 8304320 | Configuration and fabrication of semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants | William French, Constantin Bulucea | 2012-11-06 |
| 8163619 | Fabrication of semiconductor structure having asymmetric field-effect transistor with tailored pocket portion along source/drain zone | Jeng-Jiun Yang, Constantin Bulucea | 2012-04-24 |
| 8101479 | Fabrication of asymmetric field-effect transistors using L-shaped spacers | D. Courtney Parker, Donald M. Archer, Constantin Bulucea, William French, Peter Johnson +1 more | 2012-01-24 |