Issued Patents All Time
Showing 26–37 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8084827 | Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses | Constantin Bulucea, William French, Donald M. Archer, Jeng-Jiun Yang, D. Courtney Parker | 2011-12-27 |
| 7973372 | Semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants | William French, Constantin Bulucea | 2011-07-05 |
| 7968921 | Asymmetric field-effect transistor having asymmetric channel zone and differently configured source/drain extensions | Constantin Bulucea, William French, Jeng-Jiun Yang, D. Courtney Parker, Peter Johnson +1 more | 2011-06-28 |
| 7608471 | Method and apparatus for integrating III-V semiconductor devices into silicon processes | — | 2009-10-27 |
| 7592654 | Reduced crosstalk CMOS image sensors | Fredrick P. LaMaster, David W. Bigelow | 2009-09-22 |
| 7307327 | Reduced crosstalk CMOS image sensors | Frederick P. LaMaster, David W. Bigelow | 2007-12-11 |
| 7294848 | Light-emitting Group IV semiconductor devices | Glenn Rankin | 2007-11-13 |
| 7247885 | Carrier confinement in light-emitting group IV semiconductor devices | Glenn Rankin | 2007-07-24 |
| 6992337 | Gallium arsenide antimonide (GaAsSB)/indium phosphide (InP) heterojunction bipolar transistor (HBT) having reduced tunneling probability | Nicolas J. Moll | 2006-01-31 |
| 6768141 | Heterojunction bipolar transistor (HBT) having improved emitter-base grading structure | Nicolas J. Moll, Mark R. Hueschen | 2004-07-27 |
| 6586113 | Etching heterojunction interfaces | Yu-Min Houng, Virginia Robbins, Fred Sugihwo | 2003-07-01 |
| 6583044 | Buried channel in a substrate and method of making same | Karen L. Seaward | 2003-06-24 |