Issued Patents All Time
Showing 76–100 of 126 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5724366 | Semiconductor memory device | — | 1998-03-03 |
| 5710737 | Semiconductor memory device | Yuichiro Komiya, Tsukasa Ooishi, Kei Hamade | 1998-01-20 |
| 5699303 | Semiconductor memory device having controllable supplying capability of internal voltage | Takeshi Hamamoto, Yoshikazu Morooka | 1997-12-16 |
| 5694352 | Semiconductor memory device having layout area of periphery of output pad reduced | Susumu Tanida, Yasuhiko Tsukikawa, Takayuki Miyamoto | 1997-12-02 |
| 5673231 | Semiconductor memory device in which leakage current from defective memory cell can be suppressed during standby | — | 1997-09-30 |
| 5673232 | Semiconductor memory device operating stably under low power supply voltage with low power consumption | — | 1997-09-30 |
| 5668774 | Dynamic semiconductor memory device having fast operation mode and operating with low current consumption | — | 1997-09-16 |
| 5652730 | Semiconductor memory device having hierarchical boosted power-line scheme | Takashi Kono, Mikio Asakura, Hideto Hidaka | 1997-07-29 |
| 5642317 | Semiconductor memory device incorporating a test mechanism | — | 1997-06-24 |
| 5640363 | Semiconductor memory device | Tadaaki Yamauchi, Makiko Aoki | 1997-06-17 |
| 5636163 | Random access memory with a plurality amplifier groups for reading and writing in normal and test modes | Koichiro Mashiko, Kazutami Arimoto, Noriaki Matsumoto, Yoshio Matsuda | 1997-06-03 |
| 5631873 | Semiconductor memory | — | 1997-05-20 |
| 5621348 | Output driver circuit for suppressing noise generation and integrated circuit device for burn-in test | Hideyuki Ozaki | 1997-04-15 |
| 5610550 | Intermediate potential generator stably providing an internal voltage precisely held at a predeterminded intermediate potential level with reduced current consumption | — | 1997-03-11 |
| 5600607 | Semiconductor memory device that can read out data at high speed | Hiroshi Miyamoto | 1997-02-04 |
| 5587607 | Semiconductor integrated circuit device having improvement arrangement of pads | Kenichi Yasuda, Hiroshi Miyamoto | 1996-12-24 |
| 5586076 | Semiconductor memory device permitting high speed data transfer and high density integration | Hiroshi Miyamoto, Yoshikazu Morooka, Shigeru Kikuda | 1996-12-17 |
| 5537351 | Semiconductor memory device carrying out input and output of data in a predetermined bit organization | Makoto Suwa, Yoshikazu Morooka | 1996-07-16 |
| 5519243 | Semiconductor device and manufacturing method thereof | Shigeru Kikuda, Makoto Suwa | 1996-05-21 |
| 5487043 | Semiconductor memory device having equalization signal generating circuit | Tadaaki Yamauchi, Makiko Aoki | 1996-01-23 |
| 5481497 | Semiconductor memory device providing external output data signal in accordance with states of true and complementary read buses | Tadaaki Yamauchi, Hiroshi Miyamoto, Yoshikazu Morooka, Makiko Aoki | 1996-01-02 |
| 5434533 | Reference voltage generating circuit temperature-compensated without addition of manufacturing step and semiconductor device using the same | — | 1995-07-18 |
| 5375088 | Random access memory with plurality of amplifier groups | Koichiro Mashiko, Kazutami Arimoto, Noriaki Matsumoto, Yoshio Matsuda | 1994-12-20 |
| 5305261 | Semiconductor memory device and method of testing the same | Michihiro Yamada, Shigeru Mori | 1994-04-19 |
| 5293598 | Random access memory with a plurality of amplifier groups | Koichiro Mashiko, Kazutami Arimoto, Noriaki Matsumoto, Yoshio Matsuda | 1994-03-08 |