Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8248154 | Charge pump circuit | Takanobu Suzuki | 2012-08-21 |
| 7902909 | Charge pump circuit | Takanobu Suzuki | 2011-03-08 |
| 6798679 | Semiconductor memory module | Yasuhiro Matsumoto, Shinji Tanaka, Seiji Sawada, Takahiko Fukiage | 2004-09-28 |
| 6777920 | Internal power-supply potential generating circuit | Kiyohiro Furutani, Takeshi Hamamoto | 2004-08-17 |
| 6337814 | Semiconductor memory device having reference potential generating circuit | Masanori Hayashikoshi | 2002-01-08 |
| 6285602 | Semiconductor memory device provided with I/O clamp circuit | Yasuhiko Tsukikawa | 2001-09-04 |
| 6269044 | Semiconductor memory device employing an abnormal current consumption detection scheme | — | 2001-07-31 |
| 6034904 | Semiconductor memory device having selection circuit for arbitrarily setting a word line to selected state at high speed in test mode | Osamu Kuromiya, Goro Hayakawa | 2000-03-07 |
| 6031782 | Semiconductor memory device provided with an interface circuit consuming a reduced amount of current consumption | Hisao Kobashi, Mikio Sakurai | 2000-02-29 |
| 5962868 | Semiconductor device having contact check circuit | — | 1999-10-05 |
| 5905690 | Synchronous semiconductor device having circuitry capable of surely resetting test mode | Mikio Sakurai, Yasuhiko Tsukikawa, Masaya Nakano, Takahiko Fukiage | 1999-05-18 |
| 5715212 | Semiconductor memory device comprising address transition detecting circuit having stable response characteristic for address signal conversion | Yasuhiko Tsukikawa | 1998-02-03 |
| 5694352 | Semiconductor memory device having layout area of periphery of output pad reduced | Yasuhiko Tsukikawa, Kiyohiro Furutani, Takayuki Miyamoto | 1997-12-02 |
| 5666317 | Semiconductor memory device | Kazutoshi Hirayama, Tomio Suzuki, Masanori Hayashikoshi | 1997-09-09 |
| 5631867 | Semiconductor storage device requiring short time for program voltage to rise | Hiroshi Akamatsu, Yukinobu Adachi, Tooru Ichimura | 1997-05-20 |
| 5587956 | Semiconductor memory device having function of generating boosted potential | — | 1996-12-24 |
| 5574691 | Semiconductor memory device having circuit for activating predetermined rows of memory cells upon detection of disturb refresh test | Kazutoshi Hirayama, Tomio Suzuki, Masanori Hayashikoshi | 1996-11-12 |
| 5519659 | Semiconductor memory device having circuit for activating predetermined rows of memory cells upon detection of disturb refresh test | Kazutoshi Hirayama, Tomio Suzuki, Masanori Hayashikoshi | 1996-05-21 |