Issued Patents All Time
Showing 25 most recent of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12394456 | Apparatuses and methods including dice latches in a semiconductor device | Yoshiro Riho, Jian Long, Kevin G. Werhane, Liang Liu, Yoshinori Fujiwara | 2025-08-19 |
| 12346586 | Apparatuses and methods for shared row and column address buses | Reuben Pradhan | 2025-07-01 |
| 12165695 | Apparatuses for sense amplifier voltage control | Sang-Kyun Park, Yuan He | 2024-12-10 |
| 12165693 | Circuitry including a level shifter and logic, configured to receive a power up reset signal, and associated methods, devices, and systems | Yantao Ma | 2024-12-10 |
| 12076889 | Adhesion force confirmation method and adhesion force confirmation device | — | 2024-09-03 |
| 11967356 | Concurrent compensation in a memory system | Wonjun Choi, Jacob Rice, Kenji Yoshida | 2024-04-23 |
| 11951581 | Clamp system equipped with function for detecting behavior of object to be clamped | — | 2024-04-09 |
| 11935614 | Command triggered power gating for a memory device | Kwang-Ho Cho | 2024-03-19 |
| 11777488 | Charge transfer between gate terminals of sub-threshold current reduction circuit transistors and related apparatuses and methods | Yuan He, Toru Ishikawa | 2023-10-03 |
| 11727967 | Apparatuses and methods including dice latches in a semiconductor device | Yoshiro Riho, Jian Long, Kevin G. Werhane, Liang Liu, Yoshinori Fujiwara | 2023-08-15 |
| 11687289 | Generating memory array control signals | — | 2023-06-27 |
| 11658662 | Leakage current reduction in electronic devices | Ki-Jun Nam, John D. Porter | 2023-05-23 |
| 11626154 | Quarter match concurrent compensation in a memory system | Jacob Rice | 2023-04-11 |
| 11615828 | Boundary protection in memory | Ki-Jun Nam, Takamasa Suzuki, Yasushi Matsubara | 2023-03-28 |
| 11538516 | Column selector architecture with edge mat optimization | Yuan He | 2022-12-27 |
| 11515088 | Onboard power source device | Masashi Kanayama, Yuji Doi, KATSUNORI ATAGO, HIROKI NISHINAKA, Youichi Kageyama | 2022-11-29 |
| 11426901 | Magnetic clamp device | Masakazu Yoshida, Shotaro MURATA, Ikkyu Oda | 2022-08-30 |
| 11423953 | Command triggered power gating for a memory device | Kwang-Ho Cho | 2022-08-23 |
| 11361814 | Column selector architecture with edge mat optimization | Yuan He | 2022-06-14 |
| 11342906 | Delay circuits, and related semiconductor devices and methods | Zhi Qi Huang | 2022-05-24 |
| 11290103 | Charge transfer between gate terminals of subthreshold current reduction circuit transistors and related apparatuses and methods | Yuan He, Toru Ishikawa | 2022-03-29 |
| 11282560 | Temperature-based access timing for a memory device | Victor Wong, Sihong Kim, Daniele Vimercati, John D. Porter | 2022-03-22 |
| 11282569 | Apparatus with latch balancing mechanism and methods for operating the same | Yuan He | 2022-03-22 |
| 11210029 | Generating memory array control signals | — | 2021-12-28 |
| 11176985 | Boundary protection in memory | Ki-Jun Nam, Takamasa Suzuki, Yasushi Matsubara | 2021-11-16 |