Issued Patents All Time
Showing 25 most recent of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12298838 | Grouping power supplies for a sleep mode | Ki-Jun Nam, Yantao Ma, Takamasa Suzuki | 2025-05-13 |
| 12119025 | Image processing device, image processing method, and image processing program | Masato Ono, Takahide Hoshide, Shinji Fukatsu, Kenichi Minami | 2024-10-15 |
| 12118789 | Device and method for tracking objects in composed video | Masato Ono, Takahide Hoshide, Shinji Fukatsu, Kenichi Minami | 2024-10-15 |
| 12041371 | Synchronous control device, synchronous control method, and synchronous control program | Masato Ono, Takahide Hoshide, Shinji Fukatsu, Kenichi Minami | 2024-07-16 |
| 11895349 | Synchronous control device, synchronous control method, and synchronous control program | Masato Ono, Takahide Hoshide, Shinji Fukatsu, Kenichi Minami | 2024-02-06 |
| 11810607 | Memory cells and arrays of memory cells | — | 2023-11-07 |
| 11798634 | Sequential voltage control for a memory device | Ki-Jun Nam, Takamasa Suzuki, Yantao Ma | 2023-10-24 |
| 11749366 | Semiconductor memory device capable of performing soft-post-package-repair operation | Alan J. Wilson, Minoru Someya | 2023-09-05 |
| 11742013 | Apparatus and method for controlling erasing data in ferroelectric memory cells | Kiyotake Sakurai | 2023-08-29 |
| 11721372 | System and method for reading and writing memory management data through a non-volatile cell based register | Yusuke Jono, Donald M. Morgan, Nobuo Yamamoto | 2023-08-08 |
| 11615828 | Boundary protection in memory | Ki-Jun Nam, Hiroshi Akamatsu, Takamasa Suzuki | 2023-03-28 |
| 11508458 | Access schemes for access line faults in a memory device | — | 2022-11-22 |
| 11487346 | Grouping power supplies for a sleep mode | Ki-Jun Nam, Yantao Ma, Takamasa Suzuki | 2022-11-01 |
| 11462249 | System and method for reading and writing memory management data using a non-volatile cell based register | Yusuke Jono, Donald M. Morgan, Nobuo Yamamoto | 2022-10-04 |
| 11450403 | Semiconductor memory device capable of performing soft-post-package-repair operation | — | 2022-09-20 |
| 11276455 | Systems and methods for memory device power off | Takamasa Suzuki, John D. Porter, Ki-Jun Nam | 2022-03-15 |
| 11257549 | Sequential voltage control for a memory device | Ki-Jun Nam, Takamasa Suzuki, Yantao Ma | 2022-02-22 |
| 11211109 | Access schemes for protecting stored data in a memory device | — | 2021-12-28 |
| 11176985 | Boundary protection in memory | Ki-Jun Nam, Hiroshi Akamatsu, Takamasa Suzuki | 2021-11-16 |
| 11004492 | Cell bottom node reset in a memory array | Kiyotake Sakurai | 2021-05-11 |
| 10984848 | Apparatus and method for controlling erasing data in ferroelectric memory cells | Kiyotake Sakurai | 2021-04-20 |
| 10957374 | Memory cells and arrays of memory cells | — | 2021-03-23 |
| 10902935 | Access schemes for access line faults in a memory device | — | 2021-01-26 |
| 10867653 | Access schemes for protecting stored data in a memory device | — | 2020-12-15 |
| 10804225 | Power gate circuits for semiconductor devices | — | 2020-10-13 |