Issued Patents All Time
Showing 1–25 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10108249 | Memory control circuit | Seiji Seki, Kiyoshi Nakakimura | 2018-10-23 |
| 9977664 | Information processing device and information processing method in heterogenous multi-cores having different architectures | Masakatsu TOYAMA | 2018-05-22 |
| 8508986 | Semiconductor device | Hiroaki Tanizaki, Yasumitsu Murai, Takaharu Tsuji | 2013-08-13 |
| 6483761 | Semiconductor memory device | Hiroshi Akamatsu | 2002-11-19 |
| 6337814 | Semiconductor memory device having reference potential generating circuit | Susumu Tanida | 2002-01-08 |
| 6304503 | Semiconductor memory device | Hiroshi Akamatsu | 2001-10-16 |
| 6097180 | Voltage supply circuit and semiconductor device including such circuit | Masaki Tsukude | 2000-08-01 |
| 6088819 | Dynamic semiconductor memory device and method of testing the same | Yukinobu Adachi, Hiromi Okimoto | 2000-07-11 |
| 6011428 | Voltage supply circuit and semiconductor device including such circuit | Masaki Tsukude | 2000-01-04 |
| 5986915 | Semiconductor memory device capable of preventing malfunction due to disconnection of column select line or word select line | Hiromi Okimoto, Youichi Tobita | 1999-11-16 |
| 5956281 | Semiconductor memory device capable of setting substrate voltage shallow in disturb test mode and self refresh mode | Jun Nakai | 1999-09-21 |
| RE36089 | Column selecting circuit in semiconductor memory device | Tsukasa Ooishi, Kazutami Arimoto, Hideto Hidaka, Shinji Kawai, Mikio Asakura +4 more | 1999-02-09 |
| 5835419 | Semiconductor memory device with clamping circuit for preventing malfunction | Tooru Ichimura, Hiromi Okimoto, Youichi Tobita | 1998-11-10 |
| 5825694 | Semiconductor memory device capable of preventing malfunction due to disconnection of column select line or word select line | Hiromi Okimoto, Youichi Tobita | 1998-10-20 |
| 5691661 | Pulse generating circuit and a semiconductor memory device provided with the same | Tatsuya Fukuda, Shigeru Mori, Seiji Sawada | 1997-11-25 |
| 5666317 | Semiconductor memory device | Susumu Tanida, Kazutoshi Hirayama, Tomio Suzuki | 1997-09-09 |
| 5617362 | Semiconductor memory device having extended data out function | Shigeru Mori, Tomio Suzuki | 1997-04-01 |
| 5600281 | Oscillator circuit generating a clock signal having a temperature dependent cycle and a semiconductor memory device including the same | Shigeru Mori, Takeshi Kajimoto | 1997-02-04 |
| 5574691 | Semiconductor memory device having circuit for activating predetermined rows of memory cells upon detection of disturb refresh test | Susumu Tanida, Kazutoshi Hirayama, Tomio Suzuki | 1996-11-12 |
| 5554868 | Non-volatile semiconductor memory device | Yasushi Terada, Takeshi Nakayama, Yoshikazu Miyawaki, Shinichi Kobayashi | 1996-09-10 |
| 5544117 | Non-volatile semiconductor memory device with improved collective erasing operation | Takeshi Nakayama, Yasushi Terada, Kazuo Kobayashi, Yoshikazu Miyawaki | 1996-08-06 |
| 5532961 | Semiconductor memory device having extended data out function | Shigeru Mori, Tomio Suzuki | 1996-07-02 |
| 5519659 | Semiconductor memory device having circuit for activating predetermined rows of memory cells upon detection of disturb refresh test | Susumu Tanida, Kazutoshi Hirayama, Tomio Suzuki | 1996-05-21 |
| 5499214 | Oscillator circuit generating a clock signal having a temperature dependent cycle and a semiconductor memory device including the same | Shigeru Mori, Takeshi Kajimoto | 1996-03-12 |
| 5465063 | Pulse generating circuit with temperature compensation | Tatsuya Fukuda, Shigeru Mori, Seiji Sawada | 1995-11-07 |