Issued Patents All Time
Showing 1–25 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11653094 | Imaging apparatus with shaking state information display | — | 2023-05-16 |
| 11363205 | Imaging apparatus and imaging system | — | 2022-06-14 |
| 10038849 | Imaging device with controlled timing of images to be synthesized based on shake residual | — | 2018-07-31 |
| 9998668 | Imaging apparatus | — | 2018-06-12 |
| 9876958 | Imaging apparatus having a shake correction function in both of an interchangeable lens and a camera body | Michio KISHIBA | 2018-01-23 |
| 9692976 | Imaging apparatus with shake correction function | Michio KISHIBA | 2017-06-27 |
| 9432578 | Imaging apparatus having image stabilization mechanisms | Dai Shintani | 2016-08-30 |
| 8923691 | Shake correcting device and imaging apparatus having shake correcting device | Hiroyuki Kojima, Tetsuhiro Yamada, Naoko Takeda | 2014-12-30 |
| 8654228 | Imaging apparatus, camera body and interchangeable lens | Haruo Isaka, Yasuhiro Nakagai | 2014-02-18 |
| 7903155 | Image capturing apparatus and program | Yoshihiro Hara | 2011-03-08 |
| 7366828 | Memory controller, semiconductor integrated circuit device, semiconductor device, microcomputer, and electronic device | — | 2008-04-29 |
| 6973220 | Image processing method, image processing apparatus and image processing program | Daisaku Horie | 2005-12-06 |
| 6445558 | Semiconductor integrated circuit device having pseudo-tuning function | Yasuhiro Matsumoto | 2002-09-03 |
| 6064627 | Synchronous semiconductor memory device | — | 2000-05-16 |
| 6031782 | Semiconductor memory device provided with an interface circuit consuming a reduced amount of current consumption | Hisao Kobashi, Susumu Tanida | 2000-02-29 |
| 5999472 | Multi-bank synchronous semiconductor memory device with easy control | — | 1999-12-07 |
| 5973990 | Synchronous semiconductor memory device including a circuit for arbitrarily controlling activation/inactivation timing of word line | — | 1999-10-26 |
| 5970021 | Synchronous semiconductor memory device having function of inhibiting output of invalid data | — | 1999-10-19 |
| 5959930 | Multi-bank synchronous semiconductor memory device | — | 1999-09-28 |
| 5905690 | Synchronous semiconductor device having circuitry capable of surely resetting test mode | Susumu Tanida, Yasuhiko Tsukikawa, Masaya Nakano, Takahiko Fukiage | 1999-05-18 |
| 5764584 | Multi-bank synchronous semiconductor memory device | Takahiko Fukiage, Yasuhiro Konishi | 1998-06-09 |
| 5650980 | Semiconductor memory device utilizing two data line pairs and realizing high-speed data readout | Miki Nakahira | 1997-07-22 |
| 5519650 | Semiconductor device having an improved immunity to a short-circuit at a power supply line | Tooru Ichimura, Kazuhiro Sakemi, Shigeru Mori | 1996-05-21 |
| 5490119 | Semiconductor device including signal generating circuit with level converting function and with reduced area of occupation | Kenji Tokami, Kazuhiro Sakemi, Yutaka Ikeda, Yoshinori Inoue, Takeshi Kajimoto | 1996-02-06 |
| 5488247 | MOS-type semiconductor clamping circuit | — | 1996-01-30 |