Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5875132 | Semiconductor memory device for storing data comprising of plural bits and method for operating the same | — | 1999-02-23 |
| 5796287 | Output driver circuit for suppressing noise generation and integrated circuit device for burn-in test | Kiyohiro Furutani | 1998-08-18 |
| 5757228 | Output driver circuit for suppressing noise generation and integrated circuit device for burn-in test | Kiyohiro Furutani | 1998-05-26 |
| 5621348 | Output driver circuit for suppressing noise generation and integrated circuit device for burn-in test | Kiyohiro Furutani | 1997-04-15 |
| RE35141 | Substrate bias generating circuit | Kazuyasu Fujishima, Kazuhiro Shimotori | 1996-01-09 |
| 5319589 | Dynamic content addressable memory device and a method of operating thereof | Tadato Yamagata, Masaaki Mihara, Takeshi Hamamoto | 1994-06-07 |
| 4835743 | Semiconductor memory device performing multi-bit Serial operation | Hideto Hidaka, Kazuyasu Fujishima, Kazutoshi Hirayama | 1989-05-30 |
| 4833650 | Semiconductor memory device including programmable mode selection circuitry | Kazutoshi Hirayama, Kazuyasu Fujishima, Hideto Hidaka | 1989-05-23 |
| 4808844 | Semiconductor device | Kazutoshi Hirayama, Kazuyasu Fujishima, Hideto Hidaka | 1989-02-28 |
| 4789966 | Semiconductor memory device with page and nibble modes | — | 1988-12-06 |
| 4658379 | Semiconductor memory device with a laser programmable redundancy circuit | Kazuyasu Fujishima, Kazuhiro Shimotori, Hideshi Miyatake, Masahiro Tomisato | 1987-04-14 |
| 4641286 | Auxiliary decoder for semiconductor memory device | Kazuhiro Shimotori, Kazuyasu Fujishima, Hideshi Miyatake | 1987-02-03 |
| 4593382 | MOS dynamic memory device | Kazuyasu Fujishima, Kazuhiro Shimotori, Takao Nakano | 1986-06-03 |
| 4586167 | Semiconductor memory device | Kazuyasu Fujishima, Kazuhiro Shimotori, Hideshi Miyatake | 1986-04-29 |
| 4575825 | Semiconductor memory device | Kazuhiro Shimotori, Hideshi Miyatake | 1986-03-11 |
| 4551741 | Dram with polysi bit lines and added junction capacitance | Kazuhiro Shimotori | 1985-11-05 |
| 4456939 | Input protective circuit for semiconductor device | Kazuyasu Fujishima | 1984-06-26 |
| 4455628 | Substrate bias generating circuit | Kazuyasu Fujishima, Kazuhiro Shimotori | 1984-06-19 |