Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11860365 | Modeling thermal effects for a laser system | Harini CHIMALAPATI, Jingyang Xue | 2024-01-02 |
| 10672368 | No miss cache structure for real-time image transformations with multiple LSR processing engines | Ryan Scott Haraden, Tolga Ozguner, Adam J. Muff, Jeffrey Powers Bradford, Gene Leung +1 more | 2020-06-02 |
| 10572401 | Direct memory access descriptor processing using timestamps | Chad B. McBride, Jeffrey Powers Bradford, Steven Wheeler, Boris Bobrov, Andras Tantos | 2020-02-25 |
| 10528494 | Direct memory access (“DMA”) descriptor processing using identifiers assigned to descriptors on DMA engines | Chad B. McBride, Jeffrey Powers Bradford, Steven Wheeler, Boris Bobrov, Andras Tantos | 2020-01-07 |
| 10360832 | Post-rendering image transformation using parallel image transformation pipelines | Tolga Ozguner, Miguel Comparan, Jeffrey Powers Bradford | 2019-07-23 |
| 10255891 | No miss cache structure for real-time image transformations with multiple LSR processing engines | Ryan Scott Haraden, Tolga Ozguner, Adam J. Muff, Jeffrey Powers Bradford, Gene Leung +1 more | 2019-04-09 |
| 10242654 | No miss cache structure for real-time image transformations | Tolga Ozguner, Jeffrey Powers Bradford, Miguel Comparan, Gene Leung, Adam J. Muff +1 more | 2019-03-26 |
| 10241470 | No miss cache structure for real-time image transformations with data compression | Tolga Ozguner, Gene Leung, Jeffrey Powers Bradford, Adam J. Muff, Miguel Comparan +1 more | 2019-03-26 |
| 9978118 | No miss cache structure for real-time image transformations with data compression | Tolga Ozguner, Gene Leung, Jeffrey Powers Bradford, Adam J. Muff, Miguel Comparan +1 more | 2018-05-22 |
| 9715464 | Direct memory access descriptor processing | Chad B. McBride, Jeffrey Powers Bradford, Steven Wheeler, Boris Bobrov, Andras Tantos | 2017-07-25 |
| 9626322 | Interconnection network topology for large scale high performance computing (HPC) systems | Baba L. Arimilli, Wolfgang Denzel, Philip Heidelberger, German Rodriguez Herrera, Lonny Lambrecht +2 more | 2017-04-18 |
| 9519605 | Interconnection network topology for large scale high performance computing (HPC) systems | Baba L. Arimilli, Wolfgang Denzel, Philip Heidelberger, German Rodriguez Herrera, Lonny Lambrecht +2 more | 2016-12-13 |
| 6996650 | Method and apparatus for implementing multiple configurable sub-busses of a point-to-point bus | Jean Calvignac, Marco C. Heddes, Kerry Christopher Imming, Joseph Franklin Logan, Tolga Ozguner | 2006-02-07 |
| 6880026 | Method and apparatus for implementing chip-to-chip interconnect bus initialization | Kerry Christopher Imming, Tolga Ozguner | 2005-04-12 |