Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12154027 | Increased precision neural processing element | Amol Ashok Ambardekar, Kent D. Cedola, Chad B. McBride, George Petre, Larry Marvin Wall | 2024-11-26 |
| 11909422 | Neural network processor using compression and decompression of activation data to reduce memory bandwidth utilization | Joseph L. Corkery, Benjamin Eliot LUNDELL, Larry Marvin Wall, Chad B. McBride, Amol Ashok Ambardekar +2 more | 2024-02-20 |
| 11750212 | Flexible hardware for high throughput vector dequantization with dynamic vector length and codebook size | Amol Ashok Ambardekar, Aleksandar Tomic, Chad B. McBride, George Petre, Kent D. Cedola +1 more | 2023-09-05 |
| 11722147 | Dynamic sequencing of data partitions for optimizing memory utilization and performance of neural networks | Kent D. Cedola, Larry Marvin Wall, George Petre, Chad B. McBride, Amol Ashok Ambardekar | 2023-08-08 |
| 11604972 | Increased precision neural processing element | Amol Ashok Ambardekar, Kent D. Cedola, Chad B. McBride, George Petre, Larry Marvin Wall | 2023-03-14 |
| 11528033 | Neural network processor using compression and decompression of activation data to reduce memory bandwidth utilization | Joseph L. Corkery, Benjamin Eliot LUNDELL, Larry Marvin Wall, Chad B. McBride, Amol Ashok Ambardekar +2 more | 2022-12-13 |
| 11507349 | Neural processing element with single instruction multiple data (SIMD) compute lanes | Chad B. McBride, Amol Ashok Ambardekar, Kent D. Cedola, George Petre, Larry Marvin Wall | 2022-11-22 |
| 11494237 | Managing workloads of a deep neural network processor | Chad B. McBride, Amol Ashok Ambardekar, Kent D. Cedola, George Petre, Larry Marvin Wall | 2022-11-08 |
| 11476869 | Dynamically partitioning workload in a deep neural network module to reduce power consumption | Amol Ashok Ambardekar, Chad B. McBride, George Petre, Kent D. Cedola, Larry Marvin Wall | 2022-10-18 |
| 11405051 | Enhancing processing performance of artificial intelligence/machine hardware by data sharing and distribution as well as reuse of data in neuron buffer/line buffer | Chad B. McBride, Amol Ashok Ambardekar, Kent D. Cedola, George Petre, Larry Marvin Wall | 2022-08-02 |
| 11341399 | Reducing power consumption in a neural network processor by skipping processing operations | Amol Ashok Ambardekar, Chad B. McBride, George Petre, Larry Marvin Wall, Kent D. Cedola | 2022-05-24 |
| 11256976 | Dynamic sequencing of data partitions for optimizing memory utilization and performance of neural networks | Kent D. Cedola, Larry Marvin Wall, George Petre, Chad B. McBride, Amol Ashok Ambardekar | 2022-02-22 |
| 11205118 | Power-efficient deep neural network module configured for parallel kernel and parallel input processing | Amol Ashok Ambardekar, Chad B. McBride, George Petre, Larry Marvin Wall, Kent D. Cedola | 2021-12-21 |
| 11182667 | Minimizing memory reads and increasing performance by leveraging aligned blob data in a processing unit of a neural network environment | George Petre, Chad B. McBride, Amol Ashok Ambardekar, Kent D. Cedola, Larry Marvin Wall | 2021-11-23 |
| 11176448 | Enhancing processing performance of a DNN module by bandwidth control of fabric interface | Chad B. McBride, Timothy H. Heil, Amol Ashok Ambardekar, George Petre, Kent D. Cedola +1 more | 2021-11-16 |
| 11100390 | Power-efficient deep neural network module configured for layer and operation fencing and dependency management | Chad B. McBride, Amol Ashok Ambardekar, Kent D. Cedola, George Petre, Larry Marvin Wall | 2021-08-24 |
| 11100391 | Power-efficient deep neural network module configured for executing a layer descriptor list | Amol Ashok Ambardekar, Kent D. Cedola, Larry Marvin Wall, George Petre, Chad B. McBride | 2021-08-24 |
| 11030131 | Data processing performance enhancement for neural networks using a virtualized data iterator | Chad B. McBride, George Petre, Amol Ashok Ambardekar, Kent D. Cedola, Larry Marvin Wall | 2021-06-08 |
| 11010315 | Flexible hardware for high throughput vector dequantization with dynamic vector length and codebook size | Amol Ashok Ambardekar, Aleksandar Tomic, Chad B. McBride, George Petre, Kent D. Cedola +1 more | 2021-05-18 |
| 10963403 | Processing discontiguous memory as contiguous memory to improve performance of a neural network environment | George Petre, Chad B. McBride, Amol Ashok Ambardekar, Kent D. Cedola, Larry Marvin Wall | 2021-03-30 |
| 10795836 | Data processing performance enhancement for neural networks using a virtualized data iterator | Chad B. McBride, George Petre, Amol Ashok Ambardekar, Kent D. Cedola, Larry Marvin Wall | 2020-10-06 |
| 10628345 | Enhancing processing performance of a DNN module by bandwidth control of fabric interface | Chad B. McBride, Timothy H. Heil, Amol Ashok Ambardekar, George Petre, Kent D. Cedola +1 more | 2020-04-21 |
| 10572401 | Direct memory access descriptor processing using timestamps | Chad B. McBride, Jeffrey Powers Bradford, Steven Wheeler, Christopher Jon Johnson, Andras Tantos | 2020-02-25 |
| 10540584 | Queue management for direct memory access | Chad B. McBride, Amol Ashok Ambardekar, Kent D. Cedola, George Petre, Larry Marvin Wall | 2020-01-21 |
| 10528494 | Direct memory access (“DMA”) descriptor processing using identifiers assigned to descriptors on DMA engines | Chad B. McBride, Jeffrey Powers Bradford, Steven Wheeler, Christopher Jon Johnson, Andras Tantos | 2020-01-07 |