Issued Patents All Time
Showing 25 most recent of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9041572 | Testing a digital-to-analog converter | Eugene Atwood, Matthew B. Baecher, William R. Kelly, Pinping Sun | 2015-05-26 |
| 8169906 | Controlling ATM traffic using bandwidth allocation technology | Patrick Droz, Ilias Iliadis, Clark Debs Jeffries, Andreas Kind | 2012-05-01 |
| 8170024 | Implementing pointer and stake model for frame alteration code in a network processor | Kerry Christopher Imming, John D. Irish, Tolga Ozguner, Michael S. Siegel | 2012-05-01 |
| 7995472 | Flexible network processor scheduler and data flow | Jean Calvignac, Chih-jen Chang, Fabrice Jean Verplanken, Daniel Wind | 2011-08-09 |
| 7904617 | Indicating data buffer by last bit flag | Claude Basso, Jean Calvignac, Marco C. Heddes, Fabrice Jean Verplanken | 2011-03-08 |
| 7643511 | Frame alteration logic for network processors | Peter Barri, Claude Basso, Jean Calvignac, Brahmanand Kumar Gorti, Natarajan Valdhyanathan +1 more | 2010-01-05 |
| 7627701 | Indicating last data buffer by last bit flag bit | Claude Basso, Jean Calvignac, Marco C. Heddes, Fabrice Jean Verplanken | 2009-12-01 |
| 7506081 | System and method of maintaining high bandwidth requirement of a data pipe from low bandwidth memories | Peter Barri, Jean Calvignac, Kent Harold Haselhorst, Marco C. Heddes, Fabrice Jean Verplanken +1 more | 2009-03-17 |
| 7483429 | Method and system for flexible network processor scheduler and data flow | Jean Calvignac, Chih-jen Chang, Fabrice Jean Verplanken, Daniel Wind | 2009-01-27 |
| 7474672 | Frame alteration logic for network processors | Peter Barri, Claude Basso, Jean Calvignac, Brahmanand Kumar Gorti, Natarajan Vaidhyanathan +1 more | 2009-01-06 |
| 7466715 | Flexible control block format for frame description and management | Claude Basso, Jean Calvignac, Chih-jen Chang, Philippe Damon, Fabrice Jean Verplanken | 2008-12-16 |
| 7412546 | System method structure in network processor that indicates last data buffer of frame packet by last flag bit that is either in first or second position | Claude Basso, Jean Calvignac, Marco C. Heddes, Fabrice Jean Verplanken | 2008-08-12 |
| 7330478 | Method, apparatus, and computer program product for implementing pointer and stake model for frame alteration code in a network processor | Kerry Christopher Imming, John D. Irish, Tolga Ozguner, Michael S. Siegel | 2008-02-12 |
| 7317727 | Method and systems for controlling ATM traffic using bandwidth allocation technology | Patrick Droz, Ilias Iliadis, Clark Debs Jeffries, Andreas Kind | 2008-01-08 |
| 7293158 | Systems and methods for implementing counters in a network processor with cost effective memory | Jean Calvignac, Chih-jen Chang, Fabrice Jean Verplanken | 2007-11-06 |
| 7200696 | System method structure in network processor that indicates last data buffer of frame packet by last flag bit that is either in first or second position | Claude Basso, Jean Calvignac, Marco C. Heddes, Fabrice Jean Verplanken | 2007-04-03 |
| 7149212 | Apparatus, method and limited set of messages to transmit data between scheduler and a network processor | Jean Calvignac, Marco C. Heddes | 2006-12-12 |
| 7130916 | Linking frame data by inserting qualifiers in control blocks | Jean Calvignac, Marco C. Heddes, Fabrice Jean Verplanken | 2006-10-31 |
| 7085266 | Apparatus, method and limited set of messages to transmit data between components of a network processor | Jean Calvignac, Marco C. Heddes | 2006-08-01 |
| 7072347 | Assignment of packet descriptor field positions in a network processor | Jean Calvignac, Marco C. Heddes, Fabrice Jean Verplanken | 2006-07-04 |
| 6996650 | Method and apparatus for implementing multiple configurable sub-busses of a point-to-point bus | Jean Calvignac, Marco C. Heddes, Kerry Christopher Imming, Christopher Jon Johnson, Tolga Ozguner | 2006-02-07 |
| 6987760 | High speed network processor | Jean Calvignac, William John Goetzinger, Glen Howard Handlogten, Marco C. Heddes, James Francis Mikos +2 more | 2006-01-17 |
| 6937606 | Data structures for efficient processing of IP fragmentation and reassembly | Claude Basso, Jean Calvignac, Marco C. Heddes, Fabrice Jean Verplanken | 2005-08-30 |
| 6910092 | Chip to chip interface for interconnecting chips | Jean Calvignac, Marco C. Heddes, Kerry Christopher Imming, Tolga Ozguner | 2005-06-21 |
| 6836480 | Data structures for efficient processing of multicast transmissions | Claude Basso, Jean Calvignac, Marco C. Heddes, Fabrice Jean Verplanken | 2004-12-28 |