Issued Patents All Time
Showing 226–250 of 306 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7814650 | Process of fabricating microelectronic structures | — | 2010-10-19 |
| 7772632 | Memory arrays and methods of fabricating memory arrays | Gordon A. Haller | 2010-08-10 |
| 7745319 | System and method for fabricating a fin field effect transistor | Gordon A. Haller | 2010-06-29 |
| 7696567 | Semiconductor memory device | Gordon A. Haller, Steve Cummings | 2010-04-13 |
| 7687857 | Integrated circuits | Gordon A. Haller | 2010-03-30 |
| 7687342 | Method of manufacturing a memory device | Gordon A. Haller, David K. Hwang, Ceredig Roberts | 2010-03-30 |
| 7659560 | Transistor structures | Gordon A. Haller, Prashant Raghu, Ravi Iyer | 2010-02-09 |
| 7589995 | One-transistor memory cell with bias gate | Gordon A. Haller, Daniel Doyle | 2009-09-15 |
| 7550340 | Silicon rich barrier layers for integrated circuit devices | Chris Braun, Farrell M. Good | 2009-06-23 |
| 7547945 | Transistor devices, transistor structures and semiconductor constructions | Gordon A. Haller, Kris K. Brown, Tuman Earl Allen, III | 2009-06-16 |
| 7528439 | Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array | Robert Burke, Anand Srinivasan | 2009-05-05 |
| 7528064 | Interconnect structures with bond-pads and methods of forming bump sites on bond-pads | Mark E. Tuttle, Keith R. Cook | 2009-05-05 |
| 7524756 | Process of forming a semiconductor assembly having a contact structure and contact liner | Grant S. Huglin, Robert Burke | 2009-04-28 |
| 7521322 | Vertical transistors | Gordon A. Haller | 2009-04-21 |
| 7501684 | Methods of forming semiconductor constructions | Gordon A. Haller, Kris K. Brown, Tuman Earl Allen, III | 2009-03-10 |
| 7488651 | Method of making vertical transistor structures having vertical-surrounding-gates with self-aligned features | Grant S. Huglin | 2009-02-10 |
| 7470576 | Methods of forming field effect transistor gate lines | Michael P. Violette, Robert Burke | 2008-12-30 |
| 7465616 | Method of forming a field effect transistor | Michael P. Violette, Robert Burke | 2008-12-16 |
| 7405447 | Silicon rich barrier layers for integrated circuit devices | Chris Braun, Farrell M. Good | 2008-07-29 |
| 7384849 | Methods of forming recessed access devices associated with semiconductor constructions | Kunal R. Parekh, Suraj Mathew, Jigish Trivedi, John K. Zahurak | 2008-06-10 |
| 7374990 | Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array | Robert Burke, Anand Srinivasan | 2008-05-20 |
| 7332811 | Integrated circuit interconnect | Martin C. Roberts | 2008-02-19 |
| 7329924 | Integrated circuits and methods of forming a field effect transistor | Gordon A. Haller | 2008-02-12 |
| 7285812 | Vertical transistors | Gordon A. Haller | 2007-10-23 |
| 7282433 | Interconnect structures with bond-pads and methods of forming bump sites on bond-pads | Mark E. Tuttle, Keith R. Cook | 2007-10-16 |