Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
DD

Daniel Doyle — 28 Patents

Micron: 18 patents #998 of 6,374Top 20%
RRRound Rock Research: 2 patents #110 of 239Top 50%
AIAptina Imaging: 1 patents #187 of 332Top 60%
EMEmerge Print Management: 1 patents #2 of 7Top 30%
GUGrand Valley State University: 1 patents #32 of 50Top 65%
Intel: 1 patents #18,326 of 30,777Top 60%
Bellair, FL: #3 of 5 inventorsTop 60%
Florida: #1,466 of 67,251 inventorsTop 3%
Overall (All Time): #134,628 of 4,157,543Top 4%
28 Patents All Time
Daniel Doyle has been granted 28 US patents while listed as an inventor at Micron. The first was granted in 2000 and the most recent in March 2023. Daniel Doyle ranks #134,628 of 4,157,543 US inventors in our database (top 3.2%). Patent records list Daniel Doyle in Bellair, FL, US.

Issued Patents All Time

Showing 1–25 of 28 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11609724 Apparatus and method for metering and monitoring printer related data on non-networked printers Daniel Doyle, Patrick Adesso, Jill Castillenti, Gideon Hecht, Brian Lauman +1 more 2023-03-21
11111279 Nato3 mutant polypeptides and uses thereof Merritt DeLano-Taylor, Jordan Straight, Doug Peterson, Nick Huisingh 2021-09-07
10846008 Apparatuses and methods for single level cell caching 2020-11-24 $15,546,000
10809947 Apparatus and method for metering and monitoring printer related data on non-networked printers Daniel Doyle, Patrick Adesso, Jill Castillenti, Gideon Hecht, Brian Lauman +1 more 2020-10-20
10645232 Device for the passive monitoring and reporting of printer-related data on USB cables Daniel Doyle, Patrick Adesso, Jill Castillenti, Gideon Hecht, Brian Lauman +2 more 2020-05-05
10372369 Apparatuses and methods for single level cell caching 2019-08-06 $11,989,000
10353615 Apparatuses and methods for single level cell caching 2019-07-16 $16,086,000
10165130 System and method for the passive monitoring and reporting of printer-related data on USB cables Daniel Doyle, Patrick Adesso, Jill Castillenti, Gideon Hecht, Brian Lauman +2 more 2018-12-25
10048887 Apparatuses and methods for single level cell caching 2018-08-14 $28,778,000
8633513 Structures and methods for reducing junction leakage in semiconductor devices Jeffrey N. Gleason 2014-01-21
8570807 NAND architecture memory with voltage sensing 2013-10-29 $5,369,000
8446762 Methods of making a semiconductor memory device Sanh D. Tang, Gordon A. Haller 2013-05-21 $4,519,000
8295088 NAND architecture memory with voltage sensing 2012-10-23 $2,365,000
8194454 Interleaved memory program and verify method, device and system 2012-06-05
8102723 Memory device bit line sensing system and method that compensates for bit line resistance variations Jeffrey B. Quinn 2012-01-24 $3,592,000
8004897 Interleaved memory program and verify method, device and system 2011-08-23
7944743 Methods of making a semiconductor memory device Sanh D. Tang, Gordon A. Haller 2011-05-17 $3,305,000
7855922 Memory device bit line sensing system and method that compensates for bit line resistance variations Jeffrey B. Quinn 2010-12-21 $4,496,000
7808824 Interleaved memory program and verify method, device and system 2010-10-05 $2,944,000
7596035 Memory device bit line sensing system and method that compensates for bit line resistance variations Jeffrey B. Quinn 2009-09-29 $10,038,000
7593272 Detection of row-to-row shorts and other row decode defects in memory devices Michael A. Shore 2009-09-22 $6,784,000
7589995 One-transistor memory cell with bias gate Sanh D. Tang, Gordon A. Haller 2009-09-15 $6,722,000
7561472 NAND architecture memory with voltage sensing 2009-07-14 $3,519,000
7539062 Interleaved memory program and verify method, device and system 2009-05-26 $2,939,000
7501676 High density semiconductor memory 2009-03-10 $2,830,000