Issued Patents All Time
Showing 25 most recent of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11609724 | Apparatus and method for metering and monitoring printer related data on non-networked printers | Daniel Doyle, Patrick Adesso, Jill Castillenti, Gideon Hecht, Brian Lauman +1 more | 2023-03-21 |
| 11111279 | Nato3 mutant polypeptides and uses thereof | Merritt DeLano-Taylor, Jordan Straight, Doug Peterson, Nick Huisingh | 2021-09-07 |
| 10846008 | Apparatuses and methods for single level cell caching | — | 2020-11-24 |
| 10809947 | Apparatus and method for metering and monitoring printer related data on non-networked printers | Daniel Doyle, Patrick Adesso, Jill Castillenti, Gideon Hecht, Brian Lauman +1 more | 2020-10-20 |
| 10645232 | Device for the passive monitoring and reporting of printer-related data on USB cables | Daniel Doyle, Patrick Adesso, Jill Castillenti, Gideon Hecht, Brian Lauman +2 more | 2020-05-05 |
| 10372369 | Apparatuses and methods for single level cell caching | — | 2019-08-06 |
| 10353615 | Apparatuses and methods for single level cell caching | — | 2019-07-16 |
| 10165130 | System and method for the passive monitoring and reporting of printer-related data on USB cables | Daniel Doyle, Patrick Adesso, Jill Castillenti, Gideon Hecht, Brian Lauman +2 more | 2018-12-25 |
| 10048887 | Apparatuses and methods for single level cell caching | — | 2018-08-14 |
| 8633513 | Structures and methods for reducing junction leakage in semiconductor devices | Jeffrey N. Gleason | 2014-01-21 |
| 8570807 | NAND architecture memory with voltage sensing | — | 2013-10-29 |
| 8446762 | Methods of making a semiconductor memory device | Sanh D. Tang, Gordon A. Haller | 2013-05-21 |
| 8295088 | NAND architecture memory with voltage sensing | — | 2012-10-23 |
| 8194454 | Interleaved memory program and verify method, device and system | — | 2012-06-05 |
| 8102723 | Memory device bit line sensing system and method that compensates for bit line resistance variations | Jeffrey B. Quinn | 2012-01-24 |
| 8004897 | Interleaved memory program and verify method, device and system | — | 2011-08-23 |
| 7944743 | Methods of making a semiconductor memory device | Sanh D. Tang, Gordon A. Haller | 2011-05-17 |
| 7855922 | Memory device bit line sensing system and method that compensates for bit line resistance variations | Jeffrey B. Quinn | 2010-12-21 |
| 7808824 | Interleaved memory program and verify method, device and system | — | 2010-10-05 |
| 7596035 | Memory device bit line sensing system and method that compensates for bit line resistance variations | Jeffrey B. Quinn | 2009-09-29 |
| 7593272 | Detection of row-to-row shorts and other row decode defects in memory devices | Michael A. Shore | 2009-09-22 |
| 7589995 | One-transistor memory cell with bias gate | Sanh D. Tang, Gordon A. Haller | 2009-09-15 |
| 7561472 | NAND architecture memory with voltage sensing | — | 2009-07-14 |
| 7539062 | Interleaved memory program and verify method, device and system | — | 2009-05-26 |
| 7501676 | High density semiconductor memory | — | 2009-03-10 |