Issued Patents All Time
Showing 26–50 of 104 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11755478 | Block family combination and voltage bin selection | Larry J. Koudele, Mustafa N. Kaynak, Shane Nowell | 2023-09-12 |
| 11742027 | Dynamic program erase targeting with bit error rate | Bruce A. Liikanen, Larry J. Koudele | 2023-08-29 |
| 11735254 | Error avoidance based on voltage distribution parameters of blocks | Shane Nowell, Steven Michael Kientz, Mustafa N. Kaynak, Kishore Kumar Muchherla, Larry J. Koudele +1 more | 2023-08-22 |
| 11733929 | Memory system with dynamic calibration using a variable adjustment mechanism | Larry J. Koudele, Steve Kientz | 2023-08-22 |
| 11733928 | Read sample offset bit determination in a memory sub-system | Bruce A. Liikanen | 2023-08-22 |
| 11733896 | Reliability scan assisted voltage bin selection | Vamsi Pavan Rayaprolu, Shane Nowell | 2023-08-22 |
| 11727994 | Performing threshold voltage offset bin selection by package for memory devices | Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Bruce A. Liikanen, Larry J. Koudele | 2023-08-15 |
| 11726689 | Time-based combining for block families of a memory device | Shane Nowell, Vamsi Pavan Rayaprolu, Kishore Kumar Muchherla | 2023-08-15 |
| 11721409 | Smart sampling for block family scan | Vamsi Pavan Rayaprolu, Shane Nowell, Steven Michael Kientz | 2023-08-08 |
| 11721399 | Memory system with dynamic calibration using a trim management mechanism | Larry J. Koudele, Steve Kientz | 2023-08-08 |
| 11714710 | Providing data of a memory system based on an adjustable error rate | Mustafa N. Kaynak, Larry J. Koudele, Patrick R. Khayat, Sampath K. Ratnam | 2023-08-01 |
| 11714580 | Dynamic background scan optimization in a memory sub-system | Gerald L. Cadloni, Francis Chew, Bruce A. Liikanen, Larry J. Koudele | 2023-08-01 |
| 11709775 | Write data for bin resynchronization after power loss | Bruce A. Liikanen, Steven Michael Kientz | 2023-07-25 |
| 11705208 | Read level calibration in memory devices using embedded servo cells | Larry J. Koudele, Bruce A. Liikanen | 2023-07-18 |
| 11705193 | Error avoidance based on voltage distribution parameters | Shane Nowell, Steven Michael Kientz, Mustafa N. Kaynak, Kishore Kumar Muchherla, Larry J. Koudele +1 more | 2023-07-18 |
| 11705192 | Managing read level voltage offsets for low threshold voltage offset bin placements | Kishore Kumar Muchherla, Mustafa N. Kaynak, Shane Nowell | 2023-07-18 |
| 11704217 | Charge loss scan operation management in memory devices | Steven Michael Kientz, Shane Nowell, Mustafa N. Kaynak, Kishore Kumar Muchherla, Larry J. Koudele | 2023-07-18 |
| 11675511 | Associating multiple cursors with block family of memory device | Bruce A. Liikanen, Peter Feeley, Larry J. Koudele, Shane Nowell, Steven Michael Kientz | 2023-06-13 |
| 11675509 | Multiple open block families supporting multiple cursors of a memory device | Shane Nowell, Larry J. Koudele, Bruce A. Liikanen, Steve Kientz | 2023-06-13 |
| 11669380 | Dynamic programming of page margins | Larry J. Koudele, Bruce A. Liikanen | 2023-06-06 |
| 11664080 | Bin placement according to program-erase cycles | Mustafa N. Kaynak, Steven Michael Kientz | 2023-05-30 |
| 11651828 | First-pass dynamic program targeting (DPT) | Larry J. Koudele, Bruce A. Liikanen | 2023-05-16 |
| 11636913 | Tracking and refreshing state metrics in memory sub-systems | Bruce A. Liikanen, Steven Michael Kientz | 2023-04-25 |
| 11625177 | Combination scan management for block families of a memory device | Shane Nowell, Larry J. Koudele, Vamsi Pavan Rayaprolu | 2023-04-11 |
| 11609706 | Read sample offset placement | Bruce A. Liikanen, Larry J. Koudele | 2023-03-21 |