Issued Patents All Time
Showing 51–75 of 104 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11600354 | Determination of state metrics of memory sub-systems following power events | Bruce A. Liikanen, Steven Michael Kientz | 2023-03-07 |
| 11600333 | Adjustment of a voltage corresponding to a programming distribution based on a program targeting rule | Bruce A. Liikanen, Larry J. Koudele | 2023-03-07 |
| 11573720 | Open block family duration limited by time and temperature | Larry J. Koudele, Bruce A. Liikanen, Steven Michael Kientz, Kishore Kumar Muchherla | 2023-02-07 |
| 11545227 | Threshold voltage offset bin selection based on die family in memory devices | Bruce A. Liikanen, Steve Kientz, Anita Ekren, Gerald L. Cadloni | 2023-01-03 |
| 11520487 | Managing write operations during a power loss | James P. Crowley | 2022-12-06 |
| 11495322 | First-pass continuous read level calibration | Larry J. Koudele, Bruce A. Liikanen | 2022-11-08 |
| 11443830 | Error avoidance based on voltage distribution parameters of block families | Kishore Kumar Muchherla, Shane Nowell, Mustafa N. Kaynak, Larry J. Koudele | 2022-09-13 |
| 11442641 | Voltage based combining of block families for memory devices | Kishore Kumar Muchherla, Shane Nowell | 2022-09-13 |
| 11435919 | Associating multiple cursors with block family of memory device | Bruce A. Liikanen, Peter Feeley, Larry J. Koudele, Shane Nowell, Steven Michael Kientz | 2022-09-06 |
| 11429504 | Closing block family based on soft and hard closure criteria | Larry J. Koudele, Steven S. Williams | 2022-08-30 |
| 11423989 | Generating embedded data in memory cells in a memory sub-system | Bruce A. Liikanen, Larry J. Koudele | 2022-08-23 |
| 11416173 | Memory system with dynamic calibration using a variable adjustment mechanism | Larry J. Koudele, Steve Kientz | 2022-08-16 |
| 11404124 | Voltage bin boundary calibration at memory device power up | Bruce A. Liikanen, Steve Kientz | 2022-08-02 |
| 11404139 | Smart sampling for block family scan | Vamsi Pavan Rayaprolu, Shane Nowell, Steven Michael Kientz | 2022-08-02 |
| 11392328 | Dynamic background scan optimization in a memory sub-system | Gerald L. Cadloni, Francis Chew, Bruce A. Liikanen, Larry J. Koudele | 2022-07-19 |
| 11393534 | Adjustment of a starting voltage corresponding to a program operation in a memory sub-system | Bruce A. Liikanen, Larry J. Koudele | 2022-07-19 |
| 11373712 | Dynamic programming of valley margins | Larry J. Koudele, Bruce A. Liikanen | 2022-06-28 |
| 11361825 | Dynamic program erase targeting with bit error rate | Bruce A. Liikanen, Larry J. Koudele | 2022-06-14 |
| 11354043 | Temperature-based block family combinations in a memory device | Steven Michael Kientz, Larry J. Koudele, Shane Nowell, Bruce A. Liikanen | 2022-06-07 |
| 11340813 | Reliability scan assisted voltage bin selection | Vamsi Pavan Rayaprolu, Shane Nowell | 2022-05-24 |
| 11309020 | Dragging first pass read level thresholds based on changes in second pass read level thresholds | Larry J. Koudele, Bruce A. Liikanen | 2022-04-19 |
| 11301382 | Write data for bin resynchronization after power loss | Bruce A. Liikanen, Steven Michael Kientz | 2022-04-12 |
| 11288009 | Read sample offset bit determination using most probably decoder logic in a memory sub-system | Bruce A. Liikanen | 2022-03-29 |
| 11270772 | Voltage offset bin selection by die group for memory devices | Vamsi Pavan Rayaprolu, Mustafa N. Kaynak, Larry J. Koudele, Shane Nowell | 2022-03-08 |
| 11263134 | Block family combination and voltage bin selection | Larry J. Koudele, Mustafa N. Kaynak, Shane Nowell | 2022-03-01 |