Issued Patents All Time
Showing 101–125 of 126 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8400831 | Method and apparatus for improving endurance of flash memories | Hoon Cho, Kiran Pangal, Neal R. Mielke, Pranav Kalavade, Iwen Chao | 2013-03-19 |
| 8331160 | Memory device having improved programming operation | Prashant S. Damle, Alessandro Torsi, Carlo Musilli, Kalpana Vakati, Akira Goda | 2012-12-11 |
| 8198172 | Methods of forming integrated circuits using donor and acceptor substrates | Gurtej S. Sandhu | 2012-06-12 |
| 8178396 | Methods for forming three-dimensional memory devices, and related structures | Nishant Sinha | 2012-05-15 |
| 8174893 | Independent well bias management in a memory device | Akira Goda, Tomoharu Tanaka, Prashant S. Damle, Shafqat Ahmed | 2012-05-08 |
| 8072022 | Apparatus and methods for improved flash cell characteristics | Pranav Kalavade, Ervin T. Hill, Kiran Pangal | 2011-12-06 |
| 7989289 | Floating gate structures | Tejas Krishnamohan, Kyu S. Min, Srivardhan Gowda, Thomas M. Graettinger, Nirmal Ramaswamy | 2011-08-02 |
| 7990772 | Memory device having improved programming operation | Prashant S. Damle, Alessandro Torsi, Carlo Musilli, Kalpana Vakati, Akira Goda | 2011-08-02 |
| 7920419 | Isolated P-well architecture for a memory device | Prashant S. Damle, Shafqat Ahmed | 2011-04-05 |
| 7835187 | Boosting seed voltage for a memory device | Satoru Tamada, Neal R. Mielke | 2010-11-16 |
| 7582530 | Managing floating gate-to-floating gate spacing to support scalability | Henry Chao | 2009-09-01 |
| 7187591 | Memory device and method for erasing memory | Richard Fastow, Johnny Javanifard | 2007-03-06 |
| 7183162 | Method of forming non-volatile memory cell using sacrificial pillar spacers and non-volatile memory cell formed according to the method | Steven R. Soss | 2007-02-27 |
| 6949801 | Dual trench isolation using single critical lithographic patterning | Kiran Pangal, Allen Lu | 2005-09-27 |
| 6943071 | Integrated memory cell and method of fabrication | Albert Fazio, Glen Wada, Neal R. Mielke, Rex Stone | 2005-09-13 |
| 6849518 | Dual trench isolation using single critical lithographic patterning | Kiran Pangal, Allen Lu | 2005-02-01 |
| 6697282 | Reference voltage generator employing large flash memory cells coupled to threshold tuning devices | Stephen N. Keeney, Kerry D. Tedrow | 2004-02-24 |
| 6570225 | Method for improved electrostatic discharge protection | Neal K. Clark, Timothy J. Maloney | 2003-05-27 |
| 6518618 | Integrated memory cell and method of fabrication | Albert Fazio, Glen Wada, Neal R. Mielke, Rex Stone | 2003-02-11 |
| 6265292 | Method of fabrication of a novel flash integrated circuit | Raghupathy Giridhar, Cheng C. Hu, Daniel Xu, Yudong Kim, Glen Wada | 2001-07-24 |
| 6194784 | Self-aligned contact process in semiconductor fabrication and device therefrom | Glen Wada, Gregory E. Atwood, Daniel Tang | 2001-02-27 |
| 5877927 | Method and apparatus for providing electrostatic discharge protection for high voltage inputs | Timothy J. Maloney | 1999-03-02 |
| 5835328 | Breakdown-tiggered transient discharge circuit | Timothy J. Maloney | 1998-11-10 |
| 5825603 | Method and apparatus for providing electrostatic discharge protection for high voltage inputs | Timothy J. Maloney | 1998-10-20 |
| 5763912 | Depletion and enhancement MOSFETs with electrically trimmable threshold voltages | Gregory E. Atwood | 1998-06-09 |