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USPTO Patent Rankings Data through Dec 31, 2025
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Glen Wada — 11 Patents

Intel: 10 patents #4,072 of 30,777Top 15%
Fremont, CA: #1,631 of 9,298 inventorsTop 20%
California: #56,011 of 386,348 inventorsTop 15%
Overall (All Time): #435,149 of 4,157,543Top 15%
11 Patents All Time
Glen Wada has been granted 11 US patents while listed as an inventor at Intel. The first was granted in 1989 and the most recent in September 2005. Glen Wada ranks #435,149 of 4,157,543 US inventors in our database (top 10.5%). Patent records list Glen Wada in Fremont, CA, US.

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
6943071 Integrated memory cell and method of fabrication Albert Fazio, Krishna K. Parat, Neal R. Mielke, Rex Stone 2005-09-13 $17,645,000
6849896 Flash memory with UV opaque passivation layer Raghupathy Giridhar, Anthony Ozzello 2005-02-01 $25,622,000
6518618 Integrated memory cell and method of fabrication Albert Fazio, Krishna K. Parat, Neal R. Mielke, Rex Stone 2003-02-11 $38,289,000
6365521 Passivation for tight metal geometry Jan V. Shubert, Mansour Moinpour, Yang-Chin Shih, Ken Schatz 2002-04-02 $46,572,000
6350651 Method for making flash memory with UV opaque passivation layer R. V. Giridhar, Anthony Ozzello 2002-02-26 $96,208,000
6265292 Method of fabrication of a novel flash integrated circuit Krishna K. Parat, Raghupathy Giridhar, Cheng C. Hu, Daniel Xu, Yudong Kim 2001-07-24 $166,417,000
6194784 Self-aligned contact process in semiconductor fabrication and device therefrom Krishna K. Parat, Gregory E. Atwood, Daniel Tang 2001-02-27 $159,808,000
5758095 Interactive medication ordering system David Albaum, Jeff Inokuchi, Denis Kitayama, Ray Tat Lung Wong, Brian Komoto 1998-05-26
5731242 Self-aligned contact process in semiconductor fabrication Krishna K. Parat, Gregory E. Atwood, Daniel Tang 1998-03-24 $177,807,000
5087584 Process for fabricating a contactless floating gate memory array utilizing wordline trench vias Murray L. Trudel 1992-02-11 $34,424,000
4808259 Plasma etching process for MOS circuit pregate etching utiliizing a multi-step power reduction recipe Don W. Jillie, Jr., Gerald Yin 1989-02-28 $21,292,000