Issued Patents All Time
Showing 276–300 of 354 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7382005 | Circuit component with bump formed over chip | Shih-Hsiung Lin | 2008-06-03 |
| 7381642 | Top layers of metal for integrated circuits | Chiu-Ming Chou, Chien-Kang Chou | 2008-06-03 |
| 7378735 | High performance sub-system design and assembly | — | 2008-05-27 |
| 7372161 | Post passivation interconnection schemes on top of the IC chips | Chiu-Ming Chou, Chien-Kang Chou | 2008-05-13 |
| 7372162 | Multiple selectable function integrated circuit module | — | 2008-05-13 |
| 7372155 | Top layers of metal for high performance IC's | — | 2008-05-13 |
| 7372085 | Top layers of metal for high performance IC's | — | 2008-05-13 |
| 7368376 | Top layers of metal for high performance IC's | — | 2008-05-06 |
| 7360005 | Software programmable multiple function integrated circuit module | — | 2008-04-15 |
| 7358610 | Top layers of metal for high performance IC's | — | 2008-04-15 |
| 7355282 | Post passivation interconnection process and structures | Chien-Kang Chou, Chiu-Ming Chou | 2008-04-08 |
| 7351650 | Post passivation interconnection schemes on top of the IC chips | Jin-Yuan Lee | 2008-04-01 |
| 7345365 | Electronic component with die and passive device | Jin-Yuan Lee, Ching-Cheng Huang | 2008-03-18 |
| 7329954 | Top layers of metal for high performance IC's | — | 2008-02-12 |
| 7319377 | Method for making high-performance RF integrated circuits | Jin-Yuan Lee | 2008-01-15 |
| 7319277 | Chip structure with redistribution traces | — | 2008-01-15 |
| 7309920 | Chip structure and process for forming the same | Jin-Yuan Lee, Ching-Cheng Huang | 2007-12-18 |
| 7297614 | Method for fabricating circuitry component | Jin-Yuan Lee, Ching-Cheng Huang | 2007-11-20 |
| 7294870 | Top layers of metal for high performance IC's | — | 2007-11-13 |
| 7294871 | Top layers of metal for high performance IC's | — | 2007-11-13 |
| 7288845 | Fabrication of wire bond pads over underlying active devices, passive devices and/or dielectric layers in integrated circuits | Sehat Sutardja, Albert Wu, Jin-Yuan Lee | 2007-10-30 |
| 7276422 | Post passivation interconnection schemes on top of the IC chips | Jin-Yuan Lee | 2007-10-02 |
| 7271033 | Method for fabricating chip package | Jin-Yuan Lee, Ching-Cheng Huang | 2007-09-18 |
| 7271489 | Post passivation interconnection schemes on top of the IC chips | Chiu-Ming Chou, Chien-Kang Chou | 2007-09-18 |
| 7265047 | Post passivation interconnection schemes on top of the IC chips | Jin-Yuan Lee | 2007-09-04 |