Issued Patents All Time
Showing 76–100 of 129 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7081410 | Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization | — | 2006-07-25 |
| 7074623 | Methods of forming strained-semiconductor-on-insulator finFET device structures | Anthony J. Lochtefeld, Thomas A. Langdo, Richard Hammond, Matthew T. Currie, Glyn Braithwaite | 2006-07-11 |
| 7060632 | Methods for fabricating strained layers on semiconductor substrates | Matthew T. Currie | 2006-06-13 |
| 7041170 | Method of producing high quality relaxed silicon germanium layers | Richard Westhoff, Matthew T. Currie, Christopher Vineis, Thomas A. Langdo | 2006-05-09 |
| 7005668 | Method for improving hole mobility enhancement in strained silicon p-type MOSFETS | Minjoo L. Lee | 2006-02-28 |
| 6995430 | Strained-semiconductor-on-insulator device structures | Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Anthony J. Lochtefeld | 2006-02-07 |
| 6987286 | Yellow-green epitaxial transparent substrate-LEDs and lasers based on a strained-InGaP quantum well grown on an indirect bandgap substrate | Lisa McGill | 2006-01-17 |
| 6974735 | Dual layer Semiconductor Devices | — | 2005-12-13 |
| 6969875 | Buried channel strained silicon FET using a supply layer created through ion implantation | — | 2005-11-29 |
| 6940089 | Semiconductor device structure | Zhiyuan Cheng, Dimitri Antoniadis | 2005-09-06 |
| 6927147 | Coplanar integration of lattice-mismatched semiconductor with silicon via wafer bonding virtual substrates | Arthuer J. Pitera | 2005-08-09 |
| 6921914 | Process for producing semiconductor article using graded epitaxial growth | Zhi-Yuan Cheng, Dimitri Antoniadis, Judy L. Hoyt | 2005-07-26 |
| 6916727 | Enhancement of P-type metal-oxide-semiconductor field effect transistors | Christopher Leitz, Minjoo L. Lee | 2005-07-12 |
| 6900103 | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits | — | 2005-05-31 |
| 6881632 | Method of fabricating CMOS inverter and integrated circuits utilizing strained surface channel MOSFETS | Nicole Gerrish | 2005-04-19 |
| 6876010 | Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization | — | 2005-04-05 |
| 6864115 | Low threading dislocation density relaxed mismatched epilayers without high temperature growth | — | 2005-03-08 |
| 6846715 | Gate technology for strained surface channel and strained buried channel MOSFET devices | Richard Hammond, Matthew T. Currie | 2005-01-25 |
| 6838728 | Buried-channel devices and substrates for fabrication of semiconductor-based devices | Anthony J. Lochtefeld | 2005-01-04 |
| 6831292 | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same | Matthew T. Currie, Anthony J. Lochtefeld, Richard Hammond | 2004-12-14 |
| 6830976 | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits | — | 2004-12-14 |
| 6805744 | Method of producing device quality (Al)InGaP alloys on lattice-mismatched substrates | Andrew Y. Kim | 2004-10-19 |
| 6750130 | Heterointegration of materials using deposition and bonding | — | 2004-06-15 |
| 6737670 | Semiconductor substrate structure | Zhi-Yuan Cheng, Dimitri Antoniadis, Judy L. Hoyt | 2004-05-18 |
| 6730551 | Formation of planar strained layers | Minjoo L. Lee, Christopher Leitz | 2004-05-04 |