Issued Patents All Time
Showing 101–125 of 129 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6713326 | Process for producing semiconductor article using graded epitaxial growth | Zhi-Yuan Cheng, Dimitri Antoniadis, Judy L. Hoyt | 2004-03-30 |
| 6703144 | Heterointegration of materials using deposition and bonding | — | 2004-03-09 |
| 6689211 | Etch stop layer system | Kenneth Chai-en Wu, Jeffrey T. Borenstein, Gianna Taraschi | 2004-02-10 |
| 6677192 | Method of fabricating a relaxed silicon germanium platform having planarizing for high speed CMOS electronics and high speed analog circuits | — | 2004-01-13 |
| 6649480 | Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs | Nicole Gerrish | 2003-11-18 |
| 6646322 | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits | — | 2003-11-11 |
| 6602613 | Heterointegration of materials using deposition and bonding | — | 2003-08-05 |
| 6594293 | Relaxed InxGa1-xAs layers integrated with Si | Mayank Bulsara | 2003-07-15 |
| 6593191 | Buried channel strained silicon FET using a supply layer created through ion implantation | — | 2003-07-15 |
| 6589335 | Relaxed InxGa1-xAs layers integrated with Si | Mayank Bulsara | 2003-07-08 |
| 6583015 | Gate technology for strained surface channel and strained buried channel MOSFET devices | Richard Hammond, Matthew T. Currie | 2003-06-24 |
| 6573126 | Process for producing semiconductor article using graded epitaxial growth | Zhi-Yuan Cheng, Dimitri Antoniadis, Judy L. Hoyt | 2003-06-03 |
| 6555839 | Buried channel strained silicon FET using a supply layer created through ion implantation | — | 2003-04-29 |
| 6521041 | Etch stop layer system | Kenneth Chai-en Wu, Jeffrey T. Borenstein | 2003-02-18 |
| 6518644 | Low threading dislocation density relaxed mismatched epilayers without high temperature growth | — | 2003-02-11 |
| 6503773 | Low threading dislocation density relaxed mismatched epilayers without high temperature growth | — | 2003-01-07 |
| 6495868 | Relaxed InxGa1−xAs buffers | Mayank Bulsara | 2002-12-17 |
| 6291321 | Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization | — | 2001-09-18 |
| 6232138 | Relaxed InxGa(1-x)as buffers | Mayank Bulsara | 2001-05-15 |
| 6171936 | Method of producing co-planar Si and Ge composite substrate | — | 2001-01-09 |
| 6107653 | Controlling threading dislocation densities in Ge on Si using graded GeSi layers and planarization | — | 2000-08-22 |
| 6039803 | Utilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on silicon | Srikanth B. Samavedam | 2000-03-21 |
| 5442205 | Semiconductor heterostructure devices with strained semiconductor layers | Daniel Brasen, Martin L. Green, Donald Monroe, Paul Silverman, Ya-Hong Xie | 1995-08-15 |
| 5308444 | Method of making semiconductor heterostructures of gallium arsenide on germanium | Jenn-Ming Kuo, Paul Silverman, Ya-Hong Xie | 1994-05-03 |
| 5285086 | Semiconductor devices with low dislocation defects | — | 1994-02-08 |