Issued Patents All Time
Showing 51–75 of 82 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6380033 | Process to improve read disturb for NAND flash memory devices | Yue-Song He, Allen Huang | 2002-04-30 |
| 6376309 | Method for reduced gate aspect ratio to improve gap-fill after spacer etch | John Jianshi Wang, Hao Fang, Lu You | 2002-04-23 |
| 6362049 | High yield performance semiconductor process flow for NAND flash memory products | Salvatore F. Cagnina, Hao Fang, John Jianshi Wang, Masaatzi Higashitani | 2002-03-26 |
| 6355522 | Effect of doped amorphous Si thickness on better poly 1 contact resistance performance for nand type flash memory devices | John Jianshi Wang, Yuesong He | 2002-03-12 |
| 6348381 | Method for forming a nonvolatile memory with optimum bias condition | Fuh-Cheng Jong | 2002-02-19 |
| 6323047 | Method for monitoring second gate over-etch in a semiconductor device | John Jianshi Wang, Hao Fang | 2001-11-27 |
| 6324092 | Random access memory cell | Fuh-Cheng Jong, Ming-Hung Chou | 2001-11-27 |
| 6309927 | Method of forming high K tantalum pentoxide Ta2O5 instead of ONO stacked films to increase coupling ratio and improve reliability for flash memory devices | Kenneth Wo-Wai Au, David Chi | 2001-10-30 |
| 6300658 | Method for reduced gate aspect ration to improve gap-fill after spacer etch | John Jianshi Wang, Hao Fang, Lu You | 2001-10-09 |
| 6284602 | Process to reduce post cycling program VT dispersion for NAND flash memory devices | Yue-Song He, Allen Huang | 2001-09-04 |
| 6281078 | Manufacturing process to eliminate ONO fence material in high density NAND-type flash memory devices | Yuesong He, John Jianshi Wang, Ken D. Au | 2001-08-28 |
| 6235586 | Thin floating gate and conductive select gate in situ doped amorphous silicon material for NAND type flash memory device applications | Kenneth Wo-Wai Au, Hao Fang | 2001-05-22 |
| 6221164 | Method of in-situ cleaning for LPCVD teos pump | Fuodoor Gologhlan, David Chi, Hector Serrato | 2001-04-24 |
| 6218689 | Method for providing a dopant level for polysilicon for flash memory devices | Kenneth Wo-Wai Au, Hao Fang | 2001-04-17 |
| 6204159 | Method of forming select gate to improve reliability and performance for NAND type flash memory devices | Kenneth Wo-Wai Au, Yuesong He | 2001-03-20 |
| 6184084 | Method to elimate silicide cracking for nand type flash memory devices by implanting a polish rate improver into the second polysilicon layer and polishing it | David Chi, Yuesong He | 2001-02-06 |
| 6180454 | Method for forming flash memory devices | John Jianshi Wang, Wei-Wen Ou | 2001-01-30 |
| 6177312 | Method for removing contaminate nitrogen from the peripheral gate region of a non-volatile memory device during production of such device | Yuesong He, John Jianshi Wang, Toru Ishigaki, Effiong Ibok | 2001-01-23 |
| 6177316 | Post barrier metal contact implantation to minimize out diffusion for NAND device | Yue-Song He, John Jianshi Wang | 2001-01-23 |
| 6162684 | Ammonia annealed and wet oxidized LPCVD oxide to replace ono films for high integrated flash memory devices | David Chi, Chin-Yang Sun | 2000-12-19 |
| 6153470 | Floating gate engineering to improve tunnel oxide reliability for flash memory devices | Yue-Song He, Jiahua Huang | 2000-11-28 |
| 6146795 | Method for manufacturing memory devices | Jiahua Huang, Yuesong He | 2000-11-14 |
| 6143608 | Barrier layer decreases nitrogen contamination of peripheral gate regions during tunnel oxide nitridation | Yue-Song He, Masaaki Higashitani, Hao Fang, Narbeh Derhacobian, Bill Douglas Cox +2 more | 2000-11-07 |
| 6140246 | In-situ P doped amorphous silicon by NH3 to form oxidation resistant and finer grain floating gates | Ken D. Au, John Jianshi Wang | 2000-10-31 |
| 6114230 | Nitrogen ion implanted amorphous silicon to produce oxidation resistant and finer grain polysilicon based floating gates | Yuesong He, David Chi | 2000-09-05 |