Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6109775 | Method for adjusting the density of lines and contact openings across a substrate region for improving the chemical-mechanical polishing of a thin-film later disposed thereon | Prabhakar P. Tripathi, Keith K. Chao, Ratan K. Choudhury, Gauri C. Das, Nicholas K. Eib +1 more | 2000-08-29 |
| 5876838 | Semiconductor integrated circuit processing wafer having a PECVD material layer of improved thickness uniformity | — | 1999-03-02 |
| 5722877 | Technique for improving within-wafer non-uniformity of material removal for performing CMP | Anthony Meyer, Bradley Scott Withers, Douglas W. Young | 1998-03-03 |
| 5719084 | Method for the controlled formation of voids in doped glass dielectric films | Chi-Yi Kao, Wei-Jen Hsia, Atsushi Shimoda | 1998-02-17 |
| 5667433 | Keyed end effector for CMP pad conditioner | — | 1997-09-16 |
| 5628869 | Plasma enhanced chemical vapor reactor with shaped electrodes | — | 1997-05-13 |
| 5624304 | Techniques for assembling polishing pads for chemi-mechanical polishing of silicon wafers | Nicholas F. Pasch, Mark Franklin | 1997-04-29 |
| 5516400 | Techniques for assembling polishing pads for chemical-mechanical polishing of silicon wafers | Nicholas F. Pasch, Mark Franklin | 1996-05-14 |
| 5362353 | Faraday cage for barrel-style plasma etchers | — | 1994-11-08 |
| 5310455 | Techniques for assembling polishing pads for chemi-mechanical polishing of silicon wafers | Nicholas F. Pasch, Mark Franklin | 1994-05-10 |
| 5278103 | Method for the controlled formation of voids in doped glass dielectric films | Chi-Yi Kao, Wei-Jen Hsia, Atsushi Shimoda | 1994-01-11 |