PT

Prabhakar P. Tripathi

Lsi Logic: 9 patents #181 of 1,957Top 10%
Overall (All Time): #586,008 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDate
6893962 Low via resistance system Zhihai Wang, Weidan Li 2005-05-17
6828653 Method of forming metal fuses in CMOS processes with copper interconnect Ruggero Castagnetti, Ramnath Venkatraman 2004-12-07
6664141 Method of forming metal fuses in CMOS processes with copper interconnect Ruggero Castagnetti, Ramnath Venkatraman 2003-12-16
6569751 Low via resistance system Zhihai Wang, Weidan Li 2003-05-27
6109775 Method for adjusting the density of lines and contact openings across a substrate region for improving the chemical-mechanical polishing of a thin-film later disposed thereon Keith K. Chao, Ratan K. Choudhury, Gauri C. Das, Nicholas K. Eib, Ashok K. Kapoor +1 more 2000-08-29
5776831 Method of forming a high electromigration resistant metallization system Gobi R. Padmanabhan 1998-07-07
5654897 Method and structure for improving patterning design for processing Bruce Whitefield, Chi-Hung Wang 1997-08-05
5477466 Method and structure for improving patterning design for processing Bruce Whitefield, Chi-Hung Wang 1995-12-19
5379233 Method and structure for improving patterning design for processing Bruce Whitefield, Chi-Hung Wang 1995-01-03