Issued Patents All Time
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8899599 | Clamping mechanism for a two wheel panel dolly | — | 2014-12-02 |
| 7930655 | Yield profile manipulator | ChandraSekhar Desu, Nima A. Behkami, David Abercrombie, David J. Sturtevant | 2011-04-19 |
| 7799166 | Wafer edge expose alignment method | — | 2010-09-21 |
| 7653523 | Method for calculating high-resolution wafer parameter profiles | David Abercrombie | 2010-01-26 |
| 7598127 | Nanotube fuse structure | Derryl D. J. Allman, Thomas Rueckes, Claude L. Bertin | 2009-10-06 |
| 7560292 | Voltage contrast monitor for integrated circuit defects | — | 2009-07-14 |
| 7460211 | Apparatus for wafer patterning to reduce edge exclusion zone | David Abercrombie | 2008-12-02 |
| 7395522 | Yield profile manipulator | ChandraSekhar Desu, Nima A. Behkami, David Abercrombie, David J. Sturtevant | 2008-07-01 |
| 7323768 | Voltage contrast monitor for integrated circuit defects | — | 2008-01-29 |
| 7315360 | Surface coordinate system | Jason McNichols | 2008-01-01 |
| 7312880 | Wafer edge structure measurement method | Jason McNichols, David J. Sturtevant | 2007-12-25 |
| 7277813 | Pattern detection for integrated circuit substrates | Paul J. Rudolph, James McNames, Byungsool Moon | 2007-10-02 |
| 7183181 | Dynamic edge bead removal | Xiao Li, Roger Y. B. Young | 2007-02-27 |
| 7137098 | Pattern component analysis and manipulation | David Abercrombie, David Ray Turner, James McNames | 2006-11-14 |
| 7074710 | Method of wafer patterning for reducing edge exclusion zone | David Ambercrombie | 2006-07-11 |
| 7062415 | Parametric outlier detection | David Abercrombie, David Ray Turner, James McNames | 2006-06-13 |
| 7039556 | Substrate profile analysis | David Abercrombie | 2006-05-02 |
| 7013192 | Substrate contact analysis | David A. Abarcrombie | 2006-03-14 |
| 6986112 | Method of mapping logic failures in an integrated circuit die | Joseph Cowan | 2006-01-10 |
| 6971944 | Method and control system for improving CMP process by detecting and reacting to harmonic oscillation | Michael Berman, Steven Reder | 2005-12-06 |
| 6943042 | Method of detecting spatially correlated variations in a parameter of an integrated circuit die | Robert Madge, Kevin Cota | 2005-09-13 |
| 6936920 | Voltage contrast monitor for integrated circuit defects | — | 2005-08-30 |
| 6787379 | Method of detecting spatially correlated variations in a parameter of an integrated circuit die | Robert Madge, Kevin Cota | 2004-09-07 |
| 6767692 | Process for inhibiting edge peeling of coating on semiconductor substrate during formation of integrated circuit structure thereon | Roger Y. B. Young, Ann I. Kang | 2004-07-27 |
| 6650958 | Integrated process tool monitoring system for semiconductor fabrication | Attila Balázs, Hiroshi Mizuno, Russell Whaley, Paul Szasz, Steven Reder | 2003-11-18 |