KC

Kevin Cota

Lsi Logic: 6 patents #302 of 1,957Top 20%
LS Lsi: 2 patents #602 of 1,740Top 35%
📍 Portland, OR: #2,028 of 9,213 inventorsTop 25%
🗺 Oregon: #5,149 of 28,073 inventorsTop 20%
Overall (All Time): #659,292 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
7390680 Method to selectively identify reliability risk die based on characteristics of local regions on the wafer Ramon Gonzales, Manu Rehani, David Abercrombie 2008-06-24
7305634 Method to selectively identify at risk die based on location within the reticle Manu Rehani, Robert Madge 2007-12-04
6943042 Method of detecting spatially correlated variations in a parameter of an integrated circuit die Robert Madge, Bruce Whitefield 2005-09-13
6880140 Method to selectively identify reliability risk die based on characteristics of local regions on the wafer Ramon Gonzales, Manu Rehani, David Abercrombie 2005-04-12
6807655 Adaptive off tester screening method based on intrinsic die parametric measurements Manu Rehani, David Abercrombie, Robert Madge 2004-10-19
6787379 Method of detecting spatially correlated variations in a parameter of an integrated circuit die Robert Madge, Bruce Whitefield 2004-09-07
6782500 Statistical decision system Robert Madge, Emery Sugasawara, W. Robert Daasch, James McNames, Daniel R. Bockelman 2004-08-24
6598194 Test limits based on position Robert Madge, Emery Sugasawara, W. Robert Daasch, James McNames, Daniel R. Bockelman 2003-07-22