Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9158319 | Closed-loop adaptive voltage scaling for integrated circuits | Manjunatha Gowda, Ramnath Venkatraman, Thai M. Nguyen, Hai H. Tan | 2015-10-13 |
| 8806408 | Methods for designing integrated circuits employing voltage scaling and integrated circuits designed thereby | James C. Parker, Vishwas M. Rao, Clayton E. Schneider, Jr., Gregory W. Sheets | 2014-08-12 |
| 7006962 | Distributed delay prediction of multi-million gate deep sub-micron ASIC designs | Saket K. Goyal, Santhanakrishnan Raman, Prabhakaran Krishnamurthy, Manjunatha Gowda | 2006-02-28 |
| 6845348 | Driver waveform modeling with multiple effective capacitances | Sandeep Bhutani, Charutosh Dixit, Prabhakaran Krishnamurthy | 2005-01-18 |
| 6835972 | Bowtie and T-shaped structures of L-shaped mesh implementation | Radoslav Ratchkov, Thomas Antisseril, Hiroshi Ishikawa, Bo Shen, Ruben Molina | 2004-12-28 |
| 6829754 | Method and system for checking for power errors in ASIC designs | Qiong Yu, Radoslav Ratchkov, Bo Shen, Thomas Antisseril, Charutosh Dixit +1 more | 2004-12-07 |
| 6807656 | Decoupling capacitance estimation and insertion flow for ASIC designs | Lihui Cao, David Gradin, Maad Al-Dabagh, Weidan Li | 2004-10-19 |
| 6781228 | Donut power mesh scheme for flip chip package | Hiroshi Ishikawa, Thomas Antisseril, Radoslav Ratchkov, Bo Shen, Maad Al-Dabagh +2 more | 2004-08-24 |
| 6747349 | Termination ring for integrated circuit | Maad Al-Dabagh, Thomas Antisseril, Bo Shen, Radoslav Ratchkov | 2004-06-08 |