Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12334077 | Robust methods for automated audio signal to text signal processing systems | Gaurav Iyer, Kaushal Agarwal, Shuvadib Paul, Ankush Jain, Abdulrehman Sayyad | 2025-06-17 |
| 11087096 | Method and system for reducing incident alerts | Ramkumar Balasubramanian, Chandrasekhar Pilla, Shallu Gupta, Sekhar Naga Venkata Maddula | 2021-08-10 |
| 10904072 | System and method for recommending automation solutions for technology infrastructure issues | Ramkumar Balasubramanian, Chandrasekhar Pilla, Shallu Gupta, Sekhar Naga Venkata Maddula | 2021-01-26 |
| 8539411 | Multiple derating factor sets for delay calculation and library generation in multi-corner STA sign-off flow | Qian Cui | 2013-09-17 |
| 8516425 | Method and computer program for generating grounded shielding wires for signal wiring | Andrey Nikitin, Ranko Scepanovic, Igor Kucherenko, William Lau, Cheng-Gang Kong +5 more | 2013-08-20 |
| 8239813 | Method and apparatus for balancing signal delay skew | Andrey Nikitin, Ranko Scepanovic, Igor Kucherenko, William Lau, Cheng-Gang Kong +5 more | 2012-08-07 |
| 8156466 | Moment computation algorithms in VLSI system | Weiqing Guo | 2012-04-10 |
| 7996804 | Signal delay skew reduction system | Andrey Nikitin, Ranko Scepanovic, Igor Kucherenko, William Lau, Cheng-Gang Kong +5 more | 2011-08-09 |
| 7689965 | Generation of an extracted timing model file | Peter Lindberg, Richard K. Kirchner | 2010-03-30 |
| 7661083 | Probabilistic noise analysis | Payman Zarkesh-Ha, Weiqing Guo | 2010-02-09 |
| 7577928 | Verification of an extracted timing model file | Peter Lindberg, Richard K. Kirchner | 2009-08-18 |
| 7539960 | Reducing a parasitic graph in moment computation algorithms in VLSI systems | Weiqing Guo | 2009-05-26 |
| 7376918 | Probabilistic noise analysis | Payman Zarkesh-Ha, Weiqing Guo | 2008-05-20 |
| 7334204 | System for avoiding false path pessimism in estimating net delay for an integrated circuit design | Weiqing Guo, Ivan Pavisic | 2008-02-19 |
| 7299435 | Frequency dependent timing margin | Qian Cui, Jason R. Potnick | 2007-11-20 |
| 7260801 | Delay computation speed up and incrementality | Qian Cui, Weiqing Guo | 2007-08-21 |
| 7228516 | Negative bias temperature instability modeling | Qian Cui | 2007-06-05 |
| 7082583 | Method for reducing a parasitic graph in moment computation in VLSI systems | Weiqing Guo | 2006-07-25 |
| 7069178 | Method of predicting quiescent current variation of an integrated circuit die from a process monitor derating factor | Qian Cui | 2006-06-27 |
| 6990420 | Method of estimating a local average crosstalk voltage for a variable voltage output resistance model | Weiqing Guo, Oian Cui | 2006-01-24 |
| 6880142 | Method of delay calculation for variation in interconnect metal process | Qian Cui, Robert W. Davis, Payman Zarkesh-Ha, John D. Corbeil, Jr., Prabhakaran Krishnamurthy | 2005-04-12 |
| 6845348 | Driver waveform modeling with multiple effective capacitances | Prasad Subbarao, Charutosh Dixit, Prabhakaran Krishnamurthy | 2005-01-18 |
| 6820048 | 4 point derating scheme for propagation delay and setup/hold time computation | Subramanian Venkateswaran | 2004-11-16 |
| 6587999 | Modeling delays for small nets in an integrated circuit design | Lei Chen, Nianging Zhang | 2003-07-01 |