Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8694951 | Core wrapping in the presence of an embedded wrapped core | Narendra B. Devta Prasanna, Vankat Rajesh Atluri | 2014-04-08 |
| 7831876 | Testing a circuit with compressed scan chain subsets | Thai M. Nguyen, Arun Gunda | 2010-11-09 |
| 7360133 | Method for creating a JTAG tap controller in a slice for use during custom instance creation to avoid the need of a boundary scan synthesis tool | James Ngo | 2008-04-15 |
| 7284211 | Extensible IO testing implementation | Hunaid Hussain | 2007-10-16 |
| 7188330 | Handling of unused coreware with embedded boundary scan chains to avoid the need of a boundary scan synthesis tool during custom instance creation | — | 2007-03-06 |
| 7181359 | Method and system of generic implementation of sharing test pins with I/O cells | — | 2007-02-20 |
| 7047470 | Flexible and extensible implementation of sharing test pins in ASIC | — | 2006-05-16 |
| 7006962 | Distributed delay prediction of multi-million gate deep sub-micron ASIC designs | Santhanakrishnan Raman, Prabhakaran Krishnamurthy, Prasad Subbarao, Manjunatha Gowda | 2006-02-28 |