Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9771212 | Method and apparatus for dispensing dry particulate consumables | Robert L. Newsome | 2017-09-26 |
| 8806408 | Methods for designing integrated circuits employing voltage scaling and integrated circuits designed thereby | Vishwas M. Rao, Clayton E. Schneider, Jr., Gregory W. Sheets, Prasad Subbarao | 2014-08-12 |
| 8713506 | System and method for employing signoff-quality timing analysis information concurrently in multiple scenarios to reduce dynamic power in an electronic circuit and an apparatus incorporating the same | Bruce E. Zahn, Benjamin Mbouombouo | 2014-04-29 |
| 8689161 | Methods for designing integrated circuits employing pre-determined timing-realizable clock-insertion delays and integrated circuit design tools | Vishwas M. Rao | 2014-04-01 |
| 8683407 | Hierarchical design flow generator | Vishwas M. Rao | 2014-03-25 |
| 8543951 | Modeling approach for timing closure in hierarchical designs leveraging the separation of horizontal and vertical aspects of the design flow | Vishwas M. Rao, Joseph J. Jamann | 2013-09-24 |
| 8539419 | Method for designing integrated circuits employing a partitioned hierarchical design flow and an apparatus employing the method | Vishwas M. Rao | 2013-09-17 |
| 8539423 | Systematic benchmarking system and method for standardized data creation, analysis and comparison of semiconductor technology node characteristics | Joseph J. Jamann, Vishwas M. Rao | 2013-09-17 |
| 8341573 | Modeling approach for timing closure in hierarchical designs leveraging the separation of horizontal and vertical aspects of the design flow | Vishwas M. Rao, Joseph J. Jamann | 2012-12-25 |
| 8307324 | Systematic benchmarking system and method for standardized data creation, analysis and comparison of semiconductor technology node characteristics | Joseph J. Jamann, Vishwas M. Rao | 2012-11-06 |
| 8281266 | Systematic, normalized metric for analyzing and comparing optimization techniques for integrated circuits employing voltage scaling and integrated circuits designed thereby | Joseph J. Jamann, Vishwas M. Rao | 2012-10-02 |
| 8239805 | Method for designing integrated circuits employing a partitioned hierarchical design flow and an apparatus employing the method | Vishwas M. Rao | 2012-08-07 |
| 8127264 | Methods for designing integrated circuits employing context-sensitive and progressive rules and an apparatus employing one of the methods | Vishwas M. Rao, Lalita M. Satapathy, Todd M. Tope | 2012-02-28 |
| 8122422 | Establishing benchmarks for analyzing benefits associated with voltage scaling, analyzing the benefits and an apparatus therefor | Vishwas M. Rao, Stephen A. Masnica, Robert C. Sibert | 2012-02-21 |
| 8024694 | Systematic benchmarking system and method for standardized data creation, analysis and comparison of semiconductor technology node characteristics | Joseph J. Jamann, Vishwas M. Rao | 2011-09-20 |
| 7930674 | Modifying integrated circuit designs to achieve multiple operating frequency targets | Vishwas M. Rao | 2011-04-19 |
| 7712066 | Area-efficient power switching cell | Martin J. Gasper, Clayton E. Schneider, Jr. | 2010-05-04 |
| 6754616 | Method of emulating an ideal transformer valid from DC to infinite frequency | Bidyut Sen, Richard L. Wheeler | 2004-06-22 |
| 5706830 | Liquid ventilator system and use thereof | — | 1998-01-13 |
| 5701071 | Systems for controlling power consumption in integrated circuits | Jiunn-Yau Liou, Richard L. Wheeler, Bidyut Sen | 1997-12-23 |
| 4436795 | Alkaline electric storage cells | Michael John Cooper | 1984-03-13 |